| 10621092 |
Merging level cache and data cache units having indicator bits related to speculative execution |
Fernando Latorre, Josep M. Codina, Enric Gibert Codina, Pedro Lopez, Carlos Madriles +2 more |
2020-04-14 |
$33,667,000 |
| 10528473 |
Disabling cache portions during low voltage operations |
Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more |
2020-01-07 |
$22,293,000 |
| 10013326 |
Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region |
Raul Martinez, Enric Gibert Codina, Pedro Lopez, Marti Torrents Lapuerta, Polychronis Xekalakis +14 more |
2018-07-03 |
$24,450,000 |
| 9940138 |
Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations |
Pedro Lopez, Carlos Madriles, Alejandro Vicente Martinez, Raul Martinez, Josep M. Codina +2 more |
2018-04-10 |
$20,820,000 |
| 9811341 |
Managed instruction cache prefetching |
Kyriakos A. Stavrou, Enric Gibert Codina, Josep M. Codina, Crispin Gomez Requena, Mirem Hyuseinova +13 more |
2017-11-07 |
$13,901,000 |
| 9678878 |
Disabling cache portions during low voltage operations |
Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more |
2017-06-13 |
$8,497,000 |
| 9047014 |
Frequency and voltage scaling architecture |
Grigorios Magklis, Jose Gonzalez |
2015-06-02 |
$17,367,000 |
| 8909902 |
Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution |
Fernando Latorre, Josep M. Codina, Enric Gibert Codina, Pedro Lopez, Carlos Madriles +2 more |
2014-12-09 |
$17,877,000 |
| 8813057 |
Branch pruning in architectures with speculation support |
Carlos García Quiñones, Jesus Sanchez, Carlos Madriles, Pedro Marcuello |
2014-08-19 |
$23,268,000 |
| 8806491 |
Thread migration to improve power efficiency in a parallel processing environment |
Qiong Cai, Jose Gonzalez, Pedro Chappero Monferrer, Grigorios Magklis |
2014-08-12 |
$14,378,000 |
| 8719806 |
Speculative multi-threading for instruction prefetch and/or trace pre-build |
Hong Wang, Tor M. Aamodt, Pedro Marcuello, Jared W. Stark, IV, John Shen +4 more |
2014-05-06 |
$12,959,000 |
| 8689029 |
Frequency and voltage scaling architecture |
Grigorios Magklis, Jose Gonzalez |
2014-04-01 |
$15,469,000 |
| 8612698 |
Replacement policy for hot code detection |
Pedro Lopez, F. Jesus Sanchez, Josep M. Codina, Enric Gibert, Fernando Latorre +2 more |
2013-12-17 |
$16,866,000 |
| 8578137 |
Reducing aging effect on registers |
Jaume Abella, Xavier Vera |
2013-11-05 |
$24,872,000 |
| 8477558 |
Memory apparatuses with low supply voltages |
Jaume Abella, Xavier Vera, Javier Carretero Casado, Pedro Chaparro Monferrer |
2013-07-02 |
$20,773,000 |
| 8423716 |
Multithreaded clustered microarchitecture with dynamic back-end assignment |
Fernando Latorre, Jose Gonzalez |
2013-04-16 |
$28,862,000 |
| 8407497 |
Frequency and voltage scaling architecture |
Grigorios Magklis, Jose Gonzalez |
2013-03-26 |
$14,049,000 |
| 8402310 |
Detecting soft errors via selective re-execution |
Xavier Vera, Oguz Ergin, Osman Unsal, Jaume Abella |
2013-03-19 |
$13,402,000 |
| 8352812 |
Protecting data storage structures from intermittent errors |
Xavier Vera, Jaume Abella, Javier Carretero Casado |
2013-01-08 |
$19,691,000 |
| 8291168 |
Disabling cache portions during low voltage operations |
Christopher B. Wilkerson, Muhammad M. Khellah, Vivek K. De, Ming Zhang, Jaume Abella +3 more |
2012-10-16 |
$11,593,000 |
| 8261046 |
Access of register files of other threads using synchronization |
Enric Gibert, Josep M. Codina, Fernando Latorre, Jose-Alejandro Pineiro, Pedro Lopez |
2012-09-04 |
$13,616,000 |
| 8190652 |
Achieving coherence between dynamically optimized code and original code |
Fernando Latorre, Grigorios Magklis, Enric Gibert, Josep M. Codina |
2012-05-29 |
$17,150,000 |
| 8185700 |
Enabling speculative state information in a cache coherency protocol |
Carlos Madriles Gimeno, Carlos García Quiñones, Pedro Marcuello, Jesus Sanchez, Fernando Latorre |
2012-05-22 |
$25,074,000 |
| 8166323 |
Thread migration to improve power efficiency in a parallel processing environment |
Qiong Cai, Jose Gonzalez, Pedro Chaparro Monferrer, Grigorios Magklis |
2012-04-24 |
$30,122,000 |
| 8166282 |
Multi-version register file for multithreading processors with live-in precomputation |
Carlos Madriles, Peter Rundberg, Jesus Sanchez, Carlos Garcia, Pedro Marcuello |
2012-04-24 |
$30,122,000 |
