Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12050532 | Routing circuit for computer resource topology | Emiliano Morini | 2024-07-30 |
| 11481328 | Using a directory-based cache coherence system to regulate snooping | Alexandros Daglis, Paolo Faraboschi, Gary Gostin | 2022-10-25 |
| 11290792 | Loudspeaker assembly and electronic device | Junwen Li | 2022-03-29 |
| 10922137 | Dynamic thread mapping | Charles Johnson, Paolo Faraboschi | 2021-02-16 |
| 10810492 | Memory side acceleration for deep learning parameter updates | Cong Xu | 2020-10-20 |
| 10740235 | Using a directory-based cache coherence system to regulate snooping | Alexandros Daglis, Paolo Faraboschi, Gary Gostin | 2020-08-11 |
| 10725940 | Reallocate memory pending queue based on stall | Paolo Faraboschi, Cong Xu, Ping-Hsien Chi, Sai Rahul Chalamalasetti, Andrew C. Walton | 2020-07-28 |
| 10387335 | Memory system and handles to master capabilities | Dejan S. Milojicic, Moritz J. Hoffmann, Alexander Richardson | 2019-08-20 |
| 10324644 | Memory side accelerator thread assignments | Kaisheng Ma, Cong Xu, Paolo Faraboschi | 2019-06-18 |
| 10282302 | Programmable memory-side cache management for different applications | Paolo Faraboschi | 2019-05-07 |
| 10108351 | Reallocate memory pending queue based on stall | Paolo Faraboschi, Cong Xu, Ping-Hsien Chi, Sai Rahul Chalamalasetti, Andrew C. Walton | 2018-10-23 |
| 9645942 | Method for pinning data in large cache in multi-level memory system | Ferad Zyulkyarov, Nevin Hyuseinova, Blas Cuesta, Serkan Ozdemir, Marios Nicolaides | 2017-05-09 |
| 9558120 | Method, apparatus and system to cache sets of tags of an off-die cache memory | Dyer Rolan, Nevin Hyuseinova, Blas Cuesta | 2017-01-31 |
| 9405681 | Workload adaptive address mapping | Serkan Ozdemir, Ayose J. Falcon, Nevin Hyuseinova | 2016-08-02 |
| 9286237 | Memory imbalance prediction based cache management | Dyer Rolan, Blas Cuesta, Ferad Zyulkyarov, Serkan Ozdemir, Marios Nicolaides | 2016-03-15 |
| 9262336 | Page miss handler including wear leveling logic | Nevin Hyuseinova | 2016-02-16 |
| 9075746 | Utility and lifetime based cache replacement policy | Nevin Hyuseinova, Serkan Ozdemir, Ayose J. Falcon | 2015-07-07 |
| 9015404 | Persistent log operations for non-volatile memory | Ferad Zyulkyarov | 2015-04-21 |
| 9003126 | Apparatus, system and method for adaptive cache replacement in a non-volatile main memory system | Nevin Hyuseinova, Serkan Ozdemir, Ferad Zyulkyarov, Marios Nicolaides, Blas Cuesta | 2015-04-07 |
| 8990670 | Endurance aware error-correcting code (ECC) protection for non-volatile memories | Serkan Ozdemir | 2015-03-24 |
| 8806491 | Thread migration to improve power efficiency in a parallel processing environment | Jose Gonzalez, Pedro Chappero Monferrer, Grigorios Magklis, Antonio Gonzalez | 2014-08-12 |
| 8166323 | Thread migration to improve power efficiency in a parallel processing environment | Jose Gonzalez, Pedro Chaparro Monferrer, Grigorios Magklis, Antonio Gonzalez | 2012-04-24 |
| 7930574 | Thread migration to improve power efficiency in a parallel processing environment | Jose Gonzalez, Pedro Chaparro Monferrer, Grigorios Magklis, Antonio Gonzalez | 2011-04-19 |
| 7698512 | Compressing address communications between processors | Grigorios Magklis, Jose Gonzalez, Pedro Chaparro, Antonio Gonzalez | 2010-04-13 |
| 7665000 | Meeting point thread characterization | Antonio Gonzalez, Jose Gonzalez, Pedro Chaparro, Grigorios Magklis, Ryan Rakvic | 2010-02-16 |