FL

Fernando Latorre

IN Intel: 32 patents #1,134 of 30,777Top 4%
VL Vallourec Tubos Do Brasil Ltda.: 1 patents #1 of 16Top 7%
Overall (All Time): #97,319 of 4,157,543Top 3%
35
Patents All Time

Issued Patents All Time

Showing 25 most recent of 35 patents

Patent #TitleCo-InventorsDate
12032653 Method and apparatus for distributed and cooperative computation in artificial neural networks Frederico C. Pratas, Ayose J. Falcon, Marc Lupon, Pedro Lopez, Enric Herrero Abellanas +1 more 2024-07-09
11960454 Method of a universal registration and identification of legal procedures Nuria Sala Cano 2024-04-16
11636776 Unified identification protocol in training and health Nuria Sala 2023-04-25
11281965 Reconfigurable processing unit Marc Lupon, Enric Herrero Abellanas, Ayose J. Falcon, Pedro Lopez, Frederico C. Pratas 2022-03-22
11060034 Process and reactor for continuous charcoal production 2021-07-13
10997273 Method and apparatus for distributed and cooperative computation in artificial neural networks Frederico C. Pratas, Ayose J. Falcon, Marc Lupon, Pedro Lopez, Enric Herrero Abellanas +1 more 2021-05-04
10621092 Merging level cache and data cache units having indicator bits related to speculative execution Josep M. Codina, Enric Gibert Codina, Pedro Lopez, Carlos Madriles, Alejandro Martinez Vincente +2 more 2020-04-14
10402468 Processing device for performing convolution operations Enric Herrero Abellanas, Marc Lupon, Ayose J. Falcon, Frederico C. Pratas, Pedro Lopez 2019-09-03
10157063 Instruction and logic for optimization level aware branch prediction Polychronis Xekalakis, Pedro Marcuello, Alejandro Vicente Martinez, Christos E. Kotselidis, Grigorios Magklis +13 more 2018-12-18
10061587 Instruction and logic for bulk register reclamation David Keppel, Denis M. Khartikov, Marc Lupon, Grigorios Magklis, Naveen Neelakantam +2 more 2018-08-28
10013326 Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region Raul Martinez, Enric Gibert Codina, Pedro Lopez, Marti Torrents Lapuerta, Polychronis Xekalakis +14 more 2018-07-03
10002108 Processing device for performing convolution operations Enric Herrero Abellanas, Marc Lupon, Ayose J. Falcon, Frederico C. Pratas, Pedro Lopez 2018-06-19
9978014 Reconfigurable processing unit Marc Lupon, Enric Herrero Abellanas, Ayose J. Falcon, Pedro Lopez, Frederico C. Pratas 2018-05-22
9971540 Storage device and method for performing convolution operations Enric Herrero Abellanas, Georgios Tournavitis, Frederico C. Pratas, Marc Lupon, Pedro Lopez +1 more 2018-05-15
9940138 Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculations Pedro Lopez, Carlos Madriles, Alejandro Vicente Martinez, Raul Martinez, Josep M. Codina +2 more 2018-04-10
9811341 Managed instruction cache prefetching Kyriakos A. Stavrou, Enric Gibert Codina, Josep M. Codina, Crispin Gomez Requena, Antonio Gonzalez +13 more 2017-11-07
9613001 Processing device for performing convolution operations Enric Herrero Abellanas, Marc Lupon, Ayose J. Falcon, Frederico C. Pratas, Pedro Lopez 2017-04-04
9582432 Instruction and logic for support of code modification in translation lookaside buffers Jaroslaw Topp, Niranjan L. Cooray 2017-02-28
9558121 Two-level cache locking mechanism Li-Gao Zei, Steffen Kosinski, Jaroslaw Topp, Varun K. Mohandru, Lutz Naethke 2017-01-31
9507725 Store forwarding for data caches Steffen Kosinski, Niranjan L. Cooray, Stanislav Shwartsman, Ethan Kalifon, Varun K. Mohandru +4 more 2016-11-29
9367477 Instruction and logic for support of code modification in translation lookaside buffers Jaroslaw Topp, Niranjan L. Cooray 2016-06-14
9280474 Adaptive data prefetching Demos Pavlou, Pedro Lopez, Mirem Hyuseinova, Steffen Kosinski, Ralf Goettsche +1 more 2016-03-08
9195465 Cache coherency and processor consistency Varun K. Mohandru, Li-Gao Zei, Allan D. Knies, Rami May, Lutz Naethke 2015-11-24
9158705 Stride-based translation lookaside buffer (TLB) prefetching with adaptive offset Jaroslaw Topp, Pedro Lopez, Demos Pavlou, Thang Vu 2015-10-13
9009413 Method and apparatus to implement lazy flush in a virtually tagged cache memory Varun K. Mohandru, Niranjan L. Cooray, Pedro Lopez, Naveen Neelakantam, Li-Gao Zei +3 more 2015-04-14