Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10621092 | Merging level cache and data cache units having indicator bits related to speculative execution | Fernando Latorre, Josep M. Codina, Enric Gibert Codina, Pedro Lopez, Carlos Madriles +2 more | 2020-04-14 | $33,667,000 |
| 8909902 | Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential execution | Fernando Latorre, Josep M. Codina, Enric Gibert Codina, Pedro Lopez, Carlos Madriles +2 more | 2014-12-09 | $17,877,000 |