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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Pedro Marcuello — 17 Patents

Intel: 16 patents #2,596 of 30,777Top 9%
Barcelona, ES: #65 of 5,109 inventorsTop 2%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Pedro Marcuello has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 2008 and the most recent in December 2018. Pedro Marcuello ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Pedro Marcuello in Barcelona, ES.

Patents per Year

Patents granted per year, 2008 to 2018Bar chart with a peak of 6 patents in 2018.peak 62008: 1 patents20082010: 1 patents20102012: 2 patents20122013: 1 patents20132014: 2 patents20142016: 1 patents20162017: 3 patents20172018: 6 patents2018

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10157063 Instruction and logic for optimization level aware branch prediction Polychronis Xekalakis, Alejandro Vicente Martinez, Christos E. Kotselidis, Grigorios Magklis, Fernando Latorre +13 more 2018-12-18 $25,622,000
10101999 Memory address collision detection of ordered parallel threads with bloom filters Enrique de Lucas, Oren Ben-Kiki, Ilan Pardo, Yuval Yosef 2018-10-16 $21,459,000
10013326 Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code region Raul Martinez, Enric Gibert Codina, Pedro Lopez, Marti Torrents Lapuerta, Polychronis Xekalakis +14 more 2018-07-03 $24,450,000
9940686 Exploiting frame to frame coherency in a sort-middle architecture Juan Fernandez, Javier Carretero Casado, Tomas G. Akenine-Moller 2018-04-10 $20,820,000
9922393 Exploiting frame to frame coherency in a sort-middle architecture Juan Fernandez, Javier Carretero Casado, Tomas G. Akenine-Moller 2018-03-20 $13,809,000
9904977 Exploiting frame to frame coherency in a sort-middle architecture Juan Fernandez, Javier Carretero Casado, Tomas G. Akenine-Moller 2018-02-27 $23,267,000
9811341 Managed instruction cache prefetching Kyriakos A. Stavrou, Enric Gibert Codina, Josep M. Codina, Crispin Gomez Requena, Antonio Gonzalez +13 more 2017-11-07 $13,901,000
D785510 Pram 2017-05-02
9542193 Memory address collision detection of ordered parallel threads with bloom filters Enrique de Lucas, Oren Ben-Kiki, Ilan Pardo, Yuval Yosef 2017-01-10 $11,357,000
9374542 Image signal processor with a block checking circuit Kyriakos A. Stavrou, Grigorios Magklis, Javier Carretero Casado, Juan Fernandez, Carlos Madriles +2 more 2016-06-21 $13,200,000
8813057 Branch pruning in architectures with speculation support Carlos García Quiñones, Jesus Sanchez, Carlos Madriles, Antonio Gonzalez 2014-08-19 $23,268,000
8719806 Speculative multi-threading for instruction prefetch and/or trace pre-build Hong Wang, Tor M. Aamodt, Jared W. Stark, IV, John Shen, Antonio Gonzalez +4 more 2014-05-06 $12,959,000
8612698 Replacement policy for hot code detection Pedro Lopez, F. Jesus Sanchez, Josep M. Codina, Enric Gibert, Fernando Latorre +2 more 2013-12-17 $16,866,000
8185700 Enabling speculative state information in a cache coherency protocol Carlos Madriles Gimeno, Carlos García Quiñones, Jesus Sanchez, Fernando Latorre, Antonio Gonzalez 2012-05-22 $25,074,000
8166282 Multi-version register file for multithreading processors with live-in precomputation Carlos Madriles, Peter Rundberg, Jesus Sanchez, Carlos Garcia, Antonio Gonzalez 2012-04-24 $30,122,000
7814469 Speculative multi-threading for instruction prefetch and/or trace pre-build Hong Wang, Tor M. Aamodt, Jared W. Stark, IV, John Shen, Antonio Gonzalez +4 more 2010-10-12 $15,829,000
7458065 Selection of spawning pairs for a speculative multithreaded processor Jesus Sanchez, Carlos Garcia, Carlos Madriles, Peter Rundberg, Antonio Gonzalez 2008-11-25 $14,078,000