Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12189762 | Secured speculative execution processor | — | 2025-01-07 |
| 11972347 | System and method for emulating quantization noise for a neural network | Chaim Baskin, Eliyahu Schwartz, Evgenii Zheltonozhskii, Alexander Bronstein, Natan Liss | 2024-04-30 |
| 10025896 | Exploiting the scan test interface for reverse engineering of a VLSI device | Leonid Azriel, Ran Ginosar | 2018-07-17 |
| 8793404 | Atomic operations | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2014-07-29 |
| 8555101 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2013-10-08 |
| 8549183 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2013-10-01 |
| 8473642 | PCI express enhancements and extensions including device window caching | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2013-06-25 |
| 8447888 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2013-05-21 |
| 8230119 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2012-07-24 |
| 8230120 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2012-07-24 |
| 8099523 | PCI express enhancements and extensions including transactions having prefetch parameters | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2012-01-17 |
| 7958510 | Device, system and method of managing a resource request | Julius Mandelblat, Larisa Novakovsky | 2011-06-07 |
| 7451333 | Coordinating idle state transitions in multi-core processors | Alon Naveh, Ittai Anati, Eliezer Weissmann | 2008-11-11 |
| 7412569 | System and method to track changes in memory | Alon Naveh | 2008-08-12 |
| 7260684 | Trace cache filtering | Roni Rosner, Ronny Ronen | 2007-08-21 |
| 7251811 | Controlling compatibility levels of binary translations between instruction set architectures | Roni Rosner | 2007-07-31 |
| 7047395 | Reordering serial data in a system with parallel processing flows | Roni Rosner, Micha Moffie | 2006-05-16 |
| 5930830 | System and method for concatenating discontiguous memory pages | Ronald Mraz, Lucas Aaron Womack | 1999-07-27 |