Issued Patents All Time
Showing 76–86 of 86 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6553483 | Enhanced virtual renaming scheme and deadlock prevention therefor | Stephan Jourdan, Michael Bekerman | 2003-04-22 |
| 6549987 | Cache structure for storing variable length data | Lihu Rappoport, Stephan Jourdan | 2003-04-15 |
| 6516405 | Method and system for safe data dependency collapsing based on control-flow speculation | Stephan Jourdan, Freddy Gabbay, Adi Yoaz | 2003-02-04 |
| 6505293 | Register renaming to optimize identical register values | Stephan Jourdan, Adi Yoaz | 2003-01-07 |
| 6438673 | Correlated address prediction | Stephan Jourdan, Michael Bekerman, Lihu Rappoport | 2002-08-20 |
| 6412050 | Memory record update filtering | Stephan Jourdan, Michael Bekerman | 2002-06-25 |
| 6134643 | Method and apparatus for cache line prediction and prefetching using a prefetch controller and buffer and access history | Gershon Kedem, Adi Yoaz | 2000-10-17 |
| 5987595 | Method and apparatus for predicting when load instructions can be executed out-of order | Adi Yoaz, Robert Valentine | 1999-11-16 |
| 5838941 | Out-of-order superscalar microprocessor with a renaming device that maps instructions from memory to registers | Robert Valentine, Gad Sheaffer, Ilan Spillinger, Adi Yoaz | 1998-11-17 |
| 5790822 | Method and apparatus for providing a re-ordered instruction cache in a pipelined microprocessor | Gad Sheaffer | 1998-08-04 |
| 5701442 | Method of modifying an instruction set architecture of a computer processor to maintain backward compatibility | — | 1997-12-23 |