AN

Anant Vithal Nori

IN Intel: 26 patents #1,498 of 30,777Top 5%
Overall (All Time): #149,018 of 4,157,543Top 4%
26
Patents All Time

Issued Patents All Time

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
12417182 De-prioritizing speculative code lines in on-chip caches Prathmesh Kallurkar, Niranjan Soundararajan, Sreenivas Subramoney, Lihu Rappoport, Hanna Alam +2 more 2025-09-16
12405890 Method and apparatus for leveraging simultaneous multithreading for bulk compute operations Rahul Bera, Shankar Balachandran, Joydeep Rakshit, Om Ji Omer, Sreenivas Subramoney +2 more 2025-09-02
12360768 Throttling code fetch for speculative code paths Prathmesh Kallurkar, Sreenivas Subramoney, Niranjan Soundararajan 2025-07-15
12216581 System, method, and apparatus for enhanced pointer identification and prefetching Sreenivas Subramoney, Stanislav Shwartsman, Shankar Balachandran, Elad Shtiegmann, Vineeth Mekkat +2 more 2025-02-04
12112171 Loop support extensions Shankar Balachandran, Sreenivas Subramoney, Joydeep Rakshit, Vedvyas Shanbhogue, Avishaii Abuhatzera +1 more 2024-10-08
12066945 Dynamic shared cache partition for workload with large code footprint Prathmesh Kallurkar, Sreenivas Subramoney 2024-08-20
11972126 Data relocation for inline metadata David M. Durham, Michael LeMay, Sergej Deutsch, Joydeep Rakshit, Jayesh Gaur +1 more 2024-04-30
11941534 Genome sequence alignment system and method Gurpreet Singh Kalsi, Christopher J. Hughes, Sreenivas Subramoney, Damla Senol 2024-03-26
11874773 Apparatuses, methods, and systems for dual spatial pattern prefetcher Rahul Bera, Sreenivas Subramoney 2024-01-16
11847053 Apparatuses, methods, and systems for a duplication resistant on-die irregular data prefetcher Prathmesh Kallurkar, Sreenivas Subramoney 2023-12-19
11693780 System, method, and apparatus for enhanced pointer identification and prefetching Sreenivas Subramoney, Stanislav Shwartsman, Shankar Balachandran, Elad Shtiegmann, Vineeth Mekkat +2 more 2023-07-04
11575504 Cryptographic computing engine for memory load and store units of a microarchitecture pipeline David M. Durham, Michael LeMay, Michael E. Kounavis, Santosh Ghosh, Sergej Deutsch +3 more 2023-02-07
11188467 Multi-level system memory with near memory capable of storing compressed cache lines Israel Diamand, Alaa R. Alameldeen, Sreenivas Subramoney, Supratik Majumder, Srinivas Santosh Kumar MADUGULA +2 more 2021-11-30
11080194 System, method, and apparatus for enhanced pointer identification and prefetching Sreenivas Subramoney, Stanislav Shwartsman, Shankar Balachandran, Elad Shtiegmann, Vineeth Mekkat +2 more 2021-08-03
10956327 Systems and methods for mitigating dram cache conflicts through hardware assisted redirection of pages (HARP) Adithya NALLAN CHAKRAVARTHI, Jayesh Gaur, Sreenivas Subramoney 2021-03-23
10846084 Supporting timely and context triggered prefetching in microprocessors Sreenivas Subramoney, Shankar Balachandran, Hong Wang 2020-11-24
10776270 Memory-efficient last level cache architecture Jayesh Gaur, Ayan Mandal, Sreenivas Subramoney 2020-09-15
10713053 Adaptive spatial access prefetcher apparatus and method Rahul Bera, Sreenivas Subramoney, Hong Wang 2020-07-14
10635593 Create page locality in cache controller cache allocation Daniel Greenspan, Supratik Majumder, Yoav Lossin, Asaf Rubinstein 2020-04-28
10559348 System, apparatus and method for simultaneous read and precharge of a memory Lavanya Subramanian, Kaushik Vaidyanathan, Sreenivas Subramoney, Tanay Karnik 2020-02-11
10162756 Memory-efficient last level cache architecture Jayesh Gaur, Ayan Mandal, Sreenivas Subramoney 2018-12-25
9921839 Coordinated thread criticality-aware memory scheduling Lavanya Subramanian, Sreenivas Subramoney, Nithiyanandan Bashyam 2018-03-20
9846648 Create page locality in cache controller cache allocation Daniel Greenspan, Supratik Majumder, Yoav Lossin, Asaf Rubinstein 2017-12-19
9767041 Managing sectored cache Aravindh Anantaraman, Zvika Greenfield, Israel Diamand, Pradeep Ramachandran, Nir Misgav 2017-09-19
9418013 Selective prefetching for a sectored cache Aravindh Anantaraman, Zvika Greenfield, Julius Mandelblat 2016-08-16