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De-prioritizing speculative code lines in on-chip caches |
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Throttling code fetch for speculative code paths |
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| 12190114 |
Segmented branch target buffer based on branch instruction type |
Sreenivas Subramoney, Sr Swamy Saranam Chongala |
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| 12153925 |
Alternate path decode for hard-to-predict branch |
Sreenivas Subramoney |
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| 12020033 |
Apparatus and method for hardware-based memoization of function calls to reduce instruction execution |
Sreenivas Subramoney, Jayesh Gaur, S R Swamy Saranam Chongala |
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| 11928472 |
Branch prefetch mechanisms for mitigating frontend branch resteers |
Gilles A. Pokam, Jared W. Stark, IV, Oleg Ladin |
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| 11321089 |
Instruction set architecture based and automatic load tracking for opportunistic re-steer of data-dependent flaky branches |
Saurabh Gupta, Ragavendra Natarajan, Sreenivas Subramoney |
2022-05-03 |
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System, apparatus and method for context-based override of history-based branch predictions |
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2021-03-16 |
| 10740152 |
Technologies for dynamic acceleration of general-purpose code using binary translation targeted to hardware accelerators with runtime execution offload |
Jayaram Bobba |
2020-08-11 |
| 10664281 |
Apparatuses and methods for dynamic asymmetric scaling of branch predictor tables |
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2020-05-26 |
| 10642621 |
System, apparatus and method for controlling allocations into a branch prediction circuit of a processor |
Ragavendra Natarajan, Sreenivas Subramoney |
2020-05-05 |
| 10579414 |
Misprediction-triggered local history-based branch prediction |
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| 10430198 |
Dynamic detection and prediction for store-dependent branches |
Saurabh Gupta, Rahul Pal, Ragavendra Natarajan, Sreenivas Subramoney |
2019-10-01 |
| 10423422 |
Branch predictor with empirical branch bias override |
Sreenivas Subramoney, Rahul Pal, Ragavendra Natarajan |
2019-09-24 |
| 7849387 |
Detecting architectural vulnerability of processor resources |
Arijit Biswas, Shubhendu Sekhar Mukherjee |
2010-12-07 |