| 12437095 |
Register interface for computer processor |
Stanley Chen, Vivek Garg, Ankush Varma, Johan G. Van De Groenendaal |
2025-10-07 |
|
| 12093100 |
Hierarchical power management apparatus and method |
Vivek Garg, Ankush Varma, Krishnakanth V. Sistla, Nikhil Gupta, Nikethan Shivanand Baligar +20 more |
2024-09-17 |
$19,251,000 |
| 11953962 |
System, apparatus and method for configurable control of asymmetric multi-threading (SMT) on a per core basis |
Daniel J. Ragland, Guy M. Therien, Ankush Varma, David T. Mayo, Ariel Gur +2 more |
2024-04-09 |
$27,197,000 |
| 11579944 |
System, apparatus and method for configurable control of asymmetric multi-threading (SMT) on a per core basis |
Daniel J. Ragland, Guy M. Therien, Ankush Varma, David T. Mayo, Ariel Gur +2 more |
2023-02-14 |
$12,790,000 |
| 11543878 |
Power control arbitration |
Efraim Rotem, Eliezer Weissmann, Alexander Gendler, Nadav Shulman, Krishnakanth V. Sistla +10 more |
2023-01-03 |
$15,575,000 |
| 11403194 |
Systems and methods for in-field core failover |
Arijit Biswas, Reid James Riedlinger, Ian M. Steiner |
2022-08-02 |
$13,520,000 |
| 11237614 |
Multicore processor with a control register storing an indicator that two or more cores are to operate at independent performance states |
Malini K. Bhandaru, Scott P. Bobholz, Raghunandan Makaram, Vivek Garg |
2022-02-01 |
$16,992,000 |
| 10877549 |
Configuring power management functionality in a processor |
Malini K. Bhandaru, Scott P. Bobholz, Raghunandan Makaram, Vivek Garg |
2020-12-29 |
$24,597,000 |
| 10725919 |
Processors having virtually clustered cores and cache slices |
Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more |
2020-07-28 |
$26,273,000 |
| 10725920 |
Processors having virtually clustered cores and cache slices |
Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more |
2020-07-28 |
$26,273,000 |
| 10705960 |
Processors having virtually clustered cores and cache slices |
Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more |
2020-07-07 |
$29,601,000 |
| 10552270 |
Systems and methods for in-field core failover |
Arijit Biswas, Reid James Riedlinger, Ian M. Steiner |
2020-02-04 |
$21,361,000 |
| 10503542 |
Systems, methods and devices for work placement on processor cores |
Guy M. Therien, Guy G. Sotomayor, Arijit Biswas, Michael Powell |
2019-12-10 |
$22,400,000 |
| 10345884 |
Mechanism to provide workload and configuration-aware deterministic performance for microprocessors |
Ankush Varma, Krishnakanth V. Sistla, Martin T. Rowland, Chris Poirier, Avinash N. Ananthakrishnan +9 more |
2019-07-09 |
$19,303,000 |
| 10331186 |
Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states |
James S. Ignowski, Matthew Bace, Chris Poirier |
2019-06-25 |
$17,766,000 |
| 10203741 |
Configuring power management functionality in a processor |
Malini K. Bhandaru, Scott P. Bobholz, Raghunandan Makaram, Vivek Garg |
2019-02-12 |
$25,597,000 |
| 10191532 |
Configuring power management functionality in a processor |
Malini K. Bhandaru, Scott P. Bobholz, Raghunandan Makaram, Vivek Garg |
2019-01-29 |
$23,219,000 |
| 10073779 |
Processors having virtually clustered cores and cache slices |
Herbert Hum, Brinda Ganesh, James Vash, Ganesh Kumar, Leena K. Puthiyedath +6 more |
2018-09-11 |
$19,778,000 |
| 10037227 |
Systems, methods and devices for work placement on processor cores |
Guy M. Therien, Guy G. Sotomayor, Arijit Biswas, Michael Powell |
2018-07-31 |
$36,087,000 |
| 9910470 |
Controlling telemetry data communication in a processor |
Vivek Garg, Alexander Gendler, Arvind Raman, Ashish V. Choubal, Krishnakanth V. Sistla +3 more |
2018-03-06 |
$18,859,000 |
| 9760155 |
Configuring power management functionality in a processor |
Malini K. Bhandaru, Scott P. Bobholz, Raghunandan Makaram, Vivek Garg |
2017-09-12 |
$10,213,000 |
| 9575537 |
Adaptive algorithm for thermal throttling of multi-core processors with non-homogeneous performance states |
James S. Ignowski, Matthew Bace, Chris Poirier |
2017-02-21 |
$10,078,000 |
| 9436254 |
Method and apparatus for per core performance states |
Malini K. Bhandaru, Samuel Ho, Scott P. Bobholz, Chris Poirier |
2016-09-06 |
$9,244,000 |
| 9436245 |
Dynamically computing an electrical design point (EDP) for a multicore processor |
Malini K. Bhandaru, Jeremy J. Shrall |
2016-09-06 |
$9,244,000 |
| 9417681 |
Mechanism to provide workload and configuration-aware deterministic performance for microprocessors |
Ankush Varma, Krishnakanth V. Sistla, Martin T. Rowland, Chris Poirier, Avinash N. Ananthakrishnan +9 more |
2016-08-16 |
$10,311,000 |
