Issued Patents All Time
Showing 25 most recent of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12314114 | Current control for a multicore processor | Alexander Gendler, Efraim Rotem, Nir Rosenzweig, Krishnakanth V. Sistla, Ankush Varma | 2025-05-27 |
| 11762449 | Current control for a multicore processor | Alexander Gendler, Efraim Rotem, Nir Rosenzweig, Krishnakanth V. Sistla, Ankush Varma | 2023-09-19 |
| 11687135 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2023-06-27 |
| 11320888 | All-digital closed loop voltage generator | Charles Augustine, Muhammad M. Khellah, Arvind Raman, Karthik Subramanian, Abdullah Afzal +1 more | 2022-05-03 |
| 11237615 | Current control for a multicore processor | Alexander Gendler, Efraim Rotem, Nir Rosenzweig, Krishnakanth V. Sistla, Ankush Varma | 2022-02-01 |
| 11157052 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2021-10-26 |
| 10963038 | Selecting a low power state based on cache flush latency determination | Sundar Ramani, Arvind Raman, Arvind Mandhani, Kalyan Muthukumar, Ajaya V. Durg +1 more | 2021-03-30 |
| 10613611 | Current control for a multicore processor | Alexander Gendler, Efraim Rotem, Nir Rosenzweig, Krishnakanth V. Sistla, Ankush Varma | 2020-04-07 |
| 10503517 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2019-12-10 |
| 10429913 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2019-10-01 |
| 10409346 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2019-09-10 |
| 10374584 | Low power retention flip-flop with level-sensitive scan circuitry | Charles Augustine, Muhammad M. Khellah, Arvind Raman, Feroze Merchant | 2019-08-06 |
| 10198065 | Selecting a low power state based on cache flush latency determination | Sundar Ramani, Arvind Raman, Arvind Mandhani, Kalyan Muthukumar, Ajaya V. Durg +1 more | 2019-02-05 |
| 10146283 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2018-12-04 |
| 9910470 | Controlling telemetry data communication in a processor | Vivek Garg, Alexander Gendler, Arvind Raman, Krishnakanth V. Sistla, Dean Mulla +3 more | 2018-03-06 |
| 9823719 | Controlling power delivery to a processor via a bypass | Sanjeev Jahagirdar, Satish K. Damaraju, Yun-Han Chen, Ryan D. Wells, Inder M. Sodhi +3 more | 2017-11-21 |
| 9727345 | Method for booting a heterogeneous system and presenting a symmetric core view | Eliezer Weissmann, Rinat Rappoport, Michael Mishaeli, Hisham Shafi, Oron Lenz +19 more | 2017-08-08 |
| 9710041 | Masking a power state of a core of a processor | Alexander Gendler, Larisa Novakovsky, Krishnakanth V. Sistla, Vivek Garg, Dean Mulla +2 more | 2017-07-18 |
| 9665153 | Selecting a low power state based on cache flush latency determination | Sundar Ramani, Arvind Raman, Arvind Mandhani, Kalyan Muthukumar, Ajaya V. Durg +1 more | 2017-05-30 |
| 9335813 | Method and system for run-time reallocation of leakage current and dynamic power supply current | James S. Burns, Arvind Raman, Johan G. Van De Groenendaal | 2016-05-10 |
| 9250901 | Execution context swap between heterogeneous functional hardware units | Inder M. Sodhi, Marc Torrant, Zeev Offen, Michael Mishaeli, Jason W. Brandt | 2016-02-02 |
| 9026817 | Joint optimization of processor frequencies and system sleep states | Alexander W. Min, Ren Wang, Jr-Shian Tsai, Mesut A. Ergin, Tsung-Yuan C. Tai +2 more | 2015-05-05 |
| 8984311 | Method, apparatus, and system for energy efficiency and energy conservation including dynamic C0-state cache resizing | Jaideep Moses, Rameshkumar G. Illikkal, Ravishankar Iyer, Jared Eric Bendt, Sadagopan Srinivasan +3 more | 2015-03-17 |
| 8719612 | Method, system and apparatus for low-power storage of processor context information | Bruce L. Fleming, Sanjoy K. Mondal, Belliappa Kuttanna | 2014-05-06 |
| 8392728 | Reducing idle leakage power in an IC | Lance Hacking, Belliappa Kuttanna, Rajesh Patel, Terry Fletcher, Steven S. Varnum +1 more | 2013-03-05 |