Issued Patents All Time
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9612835 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2017-04-04 |
| 9383998 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2016-07-05 |
| 9342310 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Oawami | 2016-05-17 |
| 9098268 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2015-08-04 |
| 8959314 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2015-02-17 |
| 8171261 | Method and system for accessing memory in parallel computing using load fencing instructions | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2012-05-01 |
| 7136984 | Low power cache architecture | Subramaniam Maiyuran, Lyman Moulton, Satish K. Damaraju | 2006-11-14 |
| 6889291 | Method and apparatus for cache replacement for a multiple variable-way associative cache | Subramaniam Maiyuran | 2005-05-03 |
| 6842180 | Opportunistic sharing of graphics resources to enhance CPU performance in an integrated microprocessor | Subramaniam Maiyuran, Vivek Garg, Jagannath Keshava | 2005-01-11 |
| 6801208 | System and method for cache sharing | Jagganath Keshava, Vladimir Pentkovski, Subramaniam Maiyuran, Hsin-Chu Tsai | 2004-10-05 |
| 6782455 | Optimized configurable scheme for demand based resource sharing of request queues in a cache controller | Lokpraveen Mosur | 2004-08-24 |
| 6772291 | Method and apparatus for cache replacement for a multiple variable-way associative cache | Subramaniam Maiyuran | 2004-08-03 |
| 6735712 | Dynamically configurable clocking scheme for demand based resource sharing with multiple clock crossing domains | Subramaniam Maiyuran, Lokpraveen Mosur | 2004-05-11 |
| 6678810 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2004-01-13 |
| 6665775 | Cache dynamically configured for simultaneous accesses by multiple computing engines | Subramaniam Maiyuran | 2003-12-16 |
| 6651151 | MFENCE and LFENCE micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran, Shekoufeh Qawami | 2003-11-18 |
| 6643745 | Method and apparatus for prefetching data into cache | Niranjan L. Cooray, Angad Narang, Vladimir Pentkovski, Steve Tsai, Subramaniam Maiyuran +5 more | 2003-11-04 |
| 6584547 | Shared cache structure for temporal and non-temporal instructions | Niranjan L. Cooray, Angad Narang, Vladimir Pentkovski, Steve Tsai | 2003-06-24 |
| 6546462 | CLFLUSH micro-architectural implementation method and system | Stephen A. Fischer, Subramaniam Maiyuran | 2003-04-08 |
| 6526499 | Method and apparatus for load buffers | Shekoufeh Qawami, Niranjan L. Cooray, Angad Narang, Subramaniam Maiyuran | 2003-02-25 |
| 6438658 | Fast invalidation scheme for caches | Harikrishna B. Baliga, Subramaniam Maiyuran | 2002-08-20 |
| 6434673 | Optimized configurable scheme for demand based resource sharing of request queues in a cache controller | Lokpraveen Mosur | 2002-08-13 |
| 6223258 | Method and apparatus for implementing non-temporal loads | Vladimir Pentkovski, Steve Tsai | 2001-04-24 |
| 6216215 | Method and apparatus for senior loads | Shekoufeh Qawami, Niranjan L. Cooray, Angad Narang, Subramaniam Maiyuran | 2001-04-10 |
| 6205520 | Method and apparatus for implementing non-temporal stores | Vladimir Pentkovski, Steve Tsai, Subramaniam Maiyuran | 2001-03-20 |