FB

Frank Binns

IN Intel: 24 patents #1,642 of 30,777Top 6%
Overall (All Time): #173,255 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10169268 Providing state storage in a processor for system management mode Mahesh S. Natu, Thanunathan Rangarajan, Gautam Doshi, Shamanna M. Datta, Baskaran Ganesan +4 more 2019-01-01
9753832 Minimizing bandwith to compress output stream in instruction tracing systems Ilya Wagner, Matthew C. Merten, Christine E. Wang, Mayank Bomb, Tong Li +2 more 2017-09-05
9612938 Providing status of a processing device with periodic synchronization point in instruction tracing system Matthew C. Merten, Mayank Bomb, Beeman C. Strong, Peter Lachner, Jason W. Brandt +3 more 2017-04-04
9465647 Providing state storage in a processor for system management mode selectively enabled by register bit instead of external SMRAM Mahesh S. Natu, Thanunathan Rangarajan, Gautam Doshi, Shamanna M. Datta, Baskaran Ganesan +4 more 2016-10-11
9448867 Processor that detects when system management mode attempts to reach program code outside of protected space Shamanna M. Datta, Rajesh S. Parathasarathy, Mahesh S. Natu, Mohan J. Kumar 2016-09-20
8793470 Length determination of instruction code with address form field and escape opcode value by evaluating portions other than instruction specific opcode James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more 2014-07-29
8683158 Steering system management code region accesses Martin G. Dixon, David A. Koufaty, Camron Rust, Hermann W. Gartler 2014-03-25
8578138 Enabling storage of active state in internal storage of processor rather than in SMRAM upon entry to system management mode Mahesh S. Natu, Thanunathan Rangarajan, Gautam Doshi, Shammanna M. Datta, Baskaran Ganesan +4 more 2013-11-05
8423682 Address space emulation Sham M. Datta, Robert Greiner, Keshavan Tiruvallur, Rajesh S. Parthasarathy, Madhavan Parthasarathy 2013-04-16
8402252 Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more 2013-03-19
8161269 Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more 2012-04-17
7966476 Determining length of instruction with escape and addressing form bytes without evaluating opcode James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more 2011-06-21
7917734 Determining length of instruction with multiple byte escape code based on information from other than opcode byte James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more 2011-03-29
7783809 Virtualization of pin functionality in a point-to-point interface Keshavan Tiruvallur, David I. Poisner, Herbert Hum, David L. Hill, Robert Greiner +1 more 2010-08-24
7430578 Method and apparatus for performing multiply-add operations on packed byte data Eric L. Debes, William W. Macy, Jonathan J. Tyler, James S. Coke, Scott Dion Rodgers +5 more 2008-09-30
7158911 Methods and apparatus for thermal management of an integrated circuit die Stephen H. Gunther, Jack D. Pippin, Linda J. Rankin, Edward A. Burton, Douglas M. Carmean +1 more 2007-01-02
7010678 Bootstrap processor election mechanism on multiple cluster bus systems David J. O'Shea, Bruce C. Edmonds, Jr., Craig W. Keating, Larry D. Aaron, Jr., Frank E. LeClerg 2006-03-07
6980918 Methods and apparatus for thermal management of an integrated circuit die Stephen H. Gunther, Jack D. Pippin, Linda J. Rankin, Edward A. Burton, Douglas M. Carmean +1 more 2005-12-27
6925556 Method and system to determine the bootstrap processor from a plurality of operable processors David L. Hill 2005-08-02
6857066 Apparatus and method to identify the maximum operating frequency of a processor Bryant Bigbee, Shivnandan Kaushik 2005-02-15
6789037 Methods and apparatus for thermal management of an integrated circuit die Stephen H. Gunther, Jack D. Pippin, Linda J. Rankin, Edward A. Burton, Douglas M. Carmean +1 more 2004-09-07
6611911 Bootstrap processor election mechanism on multiple cluster bus system David J. O'Shea, Bruce C. Edmonds, Jr., Craig W. Keating, Larry D. Aaron, Jr., Frank E. LeClerg 2003-08-26
6349380 Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor Shahrokh Shahidzadeh, Bryant Bigbee, David B. Papworth, Robert P. Colwell 2002-02-19
5724527 Fault-tolerant boot strap mechanism for a multiprocessor system Milind Karnik, Joseph Batz, Keshavan Tiruvallur, Andrew F. Glew, Shreekant S. Thakkar +1 more 1998-03-03