Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12271735 | Apparatuses, methods, and systems toprecisely monitor memory store accesses | Ahmad Yasin, Raanan Sade, Liron Zur, Joseph Nuzman | 2025-04-08 |
| 12182571 | Systems, methods, and apparatuses for tile load, multiplication and accumulation | Robert Valentine, Menachem Adelman, Milind B. Girkar, Zeev Sperber, Mark J. Charney +10 more | 2024-12-31 |
| 12147804 | Systems, methods, and apparatuses for tile matrix multiplication and accumulation | Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport +7 more | 2024-11-19 |
| 12106100 | Systems, methods, and apparatuses for matrix operations | Robert Valentine, Mark J. Charney, Elmoustapha Ould-Ahmed-Vall, Dan Baum, Zeev Sperber +8 more | 2024-10-01 |
| 12099597 | Apparatus and method for power virus protection in a processor | Alexander Gendler, Sagi Meller, Gavri Berger | 2024-09-24 |
| 11977886 | Systems, methods, and apparatuses for tile store | Robert Valentine, Menachem Adelman, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar +10 more | 2024-05-07 |
| 11966334 | Apparatuses, methods, and systems for selective linear address masking based on processor privilege level and control register bits | Ron Gabor | 2024-04-23 |
| 11915000 | Apparatuses, methods, and systems to precisely monitor memory store accesses | Ahmad Yasin, Raanan Sade, Liron Zur, Joseph Nuzman | 2024-02-27 |
| 11809549 | Apparatus and method for power virus protection in a processor | Alexander Gendler, Sagi Meller, Gavri Berger | 2023-11-07 |
| 11714642 | Systems, methods, and apparatuses for tile store | Robert Valentine, Menachem Adelman, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar +9 more | 2023-08-01 |
| 11693785 | Memory tagging apparatus and method | Ron Gabor, Enrico Perla, Raanan Sade, Tomer Stark, Joseph Nuzman | 2023-07-04 |
| 11681533 | Restricted speculative execution mode to prevent observable side effects | Ron Gabor, Alaa R. Alameldeen, Abhishek Basak, Fangfei Liu, Francis X. McKeen +3 more | 2023-06-20 |
| 11656998 | Memory tagging metadata manipulation | Ron Gabor, Enrico Perla, Raanan Sade, Tomer Stark | 2023-05-23 |
| 11580031 | Hardware for split data translation lookaside buffers | Stanislav Shwartsman, Assaf Zaltsman, Ron Rais | 2023-02-14 |
| 11567765 | Systems, methods, and apparatuses for tile load | Robert Valentine, Menachem Adelman, Milind B. Girkar, Zeev Sperber, Mark J. Charney +9 more | 2023-01-31 |
| 11544062 | Apparatus and method for store pairing with reduced hardware requirements | Raanan Sade, Stanislav Shwartsman, Muhammad Taher, David Zysman, Liron Zur +1 more | 2023-01-03 |
| 11392380 | Apparatuses, methods, and systems to precisely monitor memory store accesses | Ahmad Yasin, Raanan Sade, Liron Zur, Joseph Nuzman | 2022-07-19 |
| 11392503 | Memory tagging apparatus and method | Ron Gabor, Raanan Sade, Assaf Zaltsman, Tomer Stark | 2022-07-19 |
| 11385704 | Adjusting a throttling threshold in a processor | Alexander Gendler, Gavri Berger, Edo Hachamo, Elkana Korem, Hanan Shomroni +3 more | 2022-07-12 |
| 11288069 | Systems, methods, and apparatuses for tile store | Robert Valentine, Menachem Adelman, Elmoustapha Ould-Ahmed-Vall, Bret L. Toll, Milind B. Girkar +9 more | 2022-03-29 |
| 11150979 | Accelerating memory fault resolution by performing fast re-fetching | Zeev Sperber, Stanislav Shwartsman, Jared W. Stark, IV, Lihu Rappoport, George Leifman | 2021-10-19 |
| 11086623 | Systems, methods, and apparatuses for tile matrix multiplication and accumulation | Robert Valentine, Zeev Sperber, Mark J. Charney, Bret L. Toll, Rinat Rappoport +7 more | 2021-08-10 |
| 10942738 | Accelerator systems and methods for matrix operations | Zeev Sperber, Amit Gradstein, Simon Rubanovich, Gavri Berger, Eyal Hadas +4 more | 2021-03-09 |
| 10936041 | Adjusting a throttling threshold in a processor | Alexander Gendler, Gavri Berger, Edo Hachamo, Elkana Korem, Hanan Shomroni +3 more | 2021-03-02 |
| 10891230 | Apparatuses, methods, and systems for selective linear address masking based on processor privilege level and control register bits | Ron Gabor | 2021-01-12 |