Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory write protection for memory corruption detection architectures

Memory write protection for memory corruption detection architectures

US Patent 10521361 · Granted Dec 31, 2019

Estimated economic value: $25,528,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems, methods, and apparatuses to control CPU speculation for the prevention 2025
Apparatuses, methods, and systems toprecisely monitor memory store accesses2025
Apparatuses and methods for speculative execution side channel mitigation2025
Systems, methods, and apparatuses for heterogeneous computing2024
Microarchitectural mechanisms for the prevention of side-channel attacks using a2024
Dynamic inclusive last level cache2024
Memory protection with hidden inline metadata2024
64-bit virtual addresses having metadata bit(s) and canonicality check that does2024
System, apparatus and method for prefetching physical pages in a processor2024
Apparatuses, methods, and systems for selective linear address masking based on 2024
Apparatuses, methods, and systems to precisely monitor memory store accesses2024
Systems, methods, and apparatuses for heterogeneous computing2023