Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6799280 | System and method for synchronizing data transfer from one domain to another by selecting output data from either a first or second storage device | Christopher D. Bryant | 2004-09-28 |
| 6535946 | Low-latency circuit for synchronizing data transfers between clock domains derived from a common clock | Christopher D. Bryant | 2003-03-18 |
| 5197144 | Data processor for reloading deferred pushes in a copy-back data cache | William B. Ledbetter, Jr. | 1993-03-23 |
| 5185694 | Data processing system utilizes block move instruction for burst transferring blocks of data entries where width of data blocks varies | Ralph McGarity, Russell A. Reininger, William B. Ledbetter, Jr., Van B. Shahan | 1993-02-09 |
| 5155824 | System for transferring selected data words between main memory and cache with multiple data words and multiple dirty bits for each address | William B. Ledbetter, Jr., Russell A. Reininger | 1992-10-13 |
| 5075846 | Memory access serialization as an MMU page attribute | Russell A. Reininger, William B. Ledbetter, Jr., Van B. Shahan, Ralph McGarity, Eric Quintana | 1991-12-24 |