Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5748645 | Clock scan design from sizzle global clock and method therefor | Craig C. Hunter | 1998-05-05 |
| 5732235 | Method and system for minimizing the number of cycles required to execute semantic routines | James Allan Kahle, Soummya Mallick, Larry B. Phillips | 1998-03-24 |
| 5717587 | Method and system for recording noneffective instructions within a data processing system | Bryan Black, Marvin Denman, Lee Evan Eisen, Robert T. Golla, Albert J. Loper +1 more | 1998-02-10 |
| 5619408 | Method and system for recoding noneffective instructions within a data processing system | Bryan Black, Marvin Denman, Lee Evan Eisen, Robert T. Golla, Albert J. Loper +1 more | 1997-04-08 |
| 5539892 | Address translation lookaside buffer replacement apparatus and method with user override | Jeff Slaton | 1996-07-23 |
| 5317701 | Method for refilling instruction queue by reading predetermined number of instruction words comprising one or more instructions and determining the actual number of instruction words used | William B. Ledbetter, Jr. | 1994-05-31 |
| 5185694 | Data processing system utilizes block move instruction for burst transferring blocks of data entries where width of data blocks varies | Robin W. Edenfield, Ralph McGarity, William B. Ledbetter, Jr., Van B. Shahan | 1993-02-09 |
| 5155824 | System for transferring selected data words between main memory and cache with multiple data words and multiple dirty bits for each address | Robin W. Edenfield, William B. Ledbetter, Jr. | 1992-10-13 |
| 5119485 | Method for data bus snooping in a data processing system by selective concurrent read and invalidate cache operation | William B. Ledbetter, Jr. | 1992-06-02 |
| 5075846 | Memory access serialization as an MMU page attribute | William B. Ledbetter, Jr., Robin W. Edenfield, Van B. Shahan, Ralph McGarity, Eric Quintana | 1991-12-24 |