Issued Patents All Time
Showing 26–49 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8996845 | Vector compare-and-exchange operation | Andrew T. Forsyth | 2015-03-31 |
| 8972994 | Method and apparatus to bypass object lock by speculative execution of generated bypass code shell based on bypass failure threshold in managed runtime environment | Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Konrad K. Lai | 2015-03-03 |
| 8924692 | Event counter checkpointing and restoring | Laura A. Knauth, Konrad K. Lai, Martin G. Dixon, Peggy J. Irelan | 2014-12-30 |
| 8881106 | Debugging parallel software using speculatively executed code sequences in a multiple core environment | Peter Lachner, Konrad K. Lai | 2014-11-04 |
| 8782382 | Last branch record indicators for transactional memory | Peter Lachner, Laura A. Knauth, Konrad K. Lai | 2014-07-15 |
| 8683143 | Unbounded transactional memory systems | Haitham Akkary, Ali-Reza Adl-Tabatabai, Bratin Saha | 2014-03-25 |
| 8627030 | Late lock acquire mechanism for hardware lock elision (HLE) | Haitham Akkary, Srikanth Srinivasan | 2014-01-07 |
| 8533436 | Adaptively handling remote atomic execution based upon contention prediction | Joshua B. Fryman, Edward T. Grochowski, Toni Juan, Andrew T. Forsyth, John Cruz Mejia +3 more | 2013-09-10 |
| 8479053 | Processor with last branch record register storing transaction indicator | Peter Lachner, Laura A. Knauth, Konrad K. Lai | 2013-07-02 |
| 8301849 | Transactional memory in out-of-order processors with XABORT having immediate argument | Martin G. Dixon, Konrad K. Lai | 2012-10-30 |
| 8190859 | Critical section detection and prediction mechanism for hardware lock elision | Haitham Akkary, Srikanth Srinivasan | 2012-05-29 |
| 8180967 | Transactional memory virtualization | Haitham Akkary, Konrad K. Lai | 2012-05-15 |
| 8180977 | Transactional memory in out-of-order processors | Haitham Akkary, Konrad K. Lai | 2012-05-15 |
| 8117392 | Method and apparatus for efficient ordered stores over an interconnection network | Mark J. Charney, Pritpal S. Ahuja, Matthew Mattina | 2012-02-14 |
| 7962699 | Concurrent execution of critical sections by eliding ownership of locks | James R. Goodman | 2011-06-14 |
| 7900023 | Technique to enable store forwarding during long latency instruction execution | Srikanth Srinivasan, Haitham Akkary, Amit Gandhi | 2011-03-01 |
| 7809903 | Coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions | Ali-Reza Adl-Tabatabai, Bratin Saha, Richard L. Hudson, Haitham Akkary | 2010-10-05 |
| 7765364 | Concurrent execution of critical sections by eliding ownership of locks | James R. Goodman | 2010-07-27 |
| 7711932 | Scalable rename map table recovery | Haitham Akkary, Srikanth Srinivasan | 2010-05-04 |
| 7685365 | Transactional memory execution utilizing virtual memory | Maurice P. Herlihy | 2010-03-23 |
| 7487337 | Back-end renaming in a continual flow processor pipeline | Haitham Akkary, Srikanth Srinivasan | 2009-02-03 |
| 7340569 | Computer architecture providing transactional, lock-free execution of lock-based programs | James R. Goodman | 2008-03-04 |
| 7120762 | Concurrent execution of critical sections by eliding ownership of locks | James R. Goodman | 2006-10-10 |
| 6460124 | Method of using delays to speed processing of inferred critical program portions | Alain Kagi, James R. Goodman | 2002-10-01 |