Issued Patents All Time
Showing 1–25 of 116 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11403095 | Scalable code repository with green master | Sundaram Ananthanarayanan, Masoud Saeida Ardekani, Denis Haenikel, Balaji Varadarajan, Simon Santiago Soriano-Perez +1 more | 2022-08-02 |
| 10942731 | Scalable code repository with green master | Sundaram Ananthanarayanan, Masoud Saeida Ardekani, Denis Haenikel, Balaji Varadarajan, Simon Santiago Soriano-Perez +1 more | 2021-03-09 |
| 10387296 | Methods and systems to identify and reproduce concurrency violations in multi-threaded programs using expressions | Youfeng Wu, Justin E. Gottschlich, Gilles A. Pokam, Shiliang Hu, Cristiano L. Pereira | 2019-08-20 |
| 10210018 | Optimizing quiescence in a software transactional memory (STM) system | Tatiana Shpeisman, Vijay Menon | 2019-02-19 |
| 9767027 | Private memory regions and coherency optimization by controlling snoop traffic volume in multi-level cache hierarchy | Jan Gray, David Callahn, Burton Smith, Gad Sheaffer | 2017-09-19 |
| 9733912 | Optimizing intermediate representation of script code for fast path execution | Guilherme de Lima Ottoni, Michael H. Paleczny | 2017-08-15 |
| 9658880 | Efficient garbage collection and exception handling in a hardware accelerated transactional memory system | Jan Gray, Martin Taillefer, Yosseff Levanoni, Dave Detlefs, Vinod Grover +2 more | 2017-05-23 |
| 9606919 | Method and apparatus to facilitate shared pointers in a heterogeneous platform | Yang Ni, Rajkishore Barik, Tatiana Shpeisman, Jayanth N. Rao, Ben J. Ashbaugh +1 more | 2017-03-28 |
| 9594565 | Hardware acceleration of a write-buffering software transactional memory | Bratin Saha, Quinn A. Jacobson | 2017-03-14 |
| 9558118 | Tracing mechanism for recording shared memory interleavings on multi-core processors | Gilles A. Pokam, Cristiano L. Pereira | 2017-01-31 |
| 9552195 | Enlarging control regions to optimize script code compilation | Guilherme de Lima Ottoni | 2017-01-24 |
| 9519467 | Efficient and consistent software transactional memory | Cheng Wang, Youfeng Wu, Wei-Yu Chen, Bratin Saha | 2016-12-13 |
| 9477515 | Handling operating system (OS) transitions in an unbounded transactional memory (UTM) mode | Koichi Yamada, Landy Wang, Martin Taillefer, Arun U. Kishan, David Callahan +2 more | 2016-10-25 |
| 9383979 | Optimizing intermediate representation of script code by eliminating redundant reference count operations | Guilherme de Lima Ottoni, Michael H. Paleczny | 2016-07-05 |
| 9336066 | Hybrid linear validation algorithm for software transactional memory (STM) systems | Adam Welc, Bratin Saha | 2016-05-10 |
| 9317265 | Optimizing intermediate representation of script code for atomic execution | Guilherme de Lima Ottoni, Michael H. Paleczny | 2016-04-19 |
| 9304769 | Handling precompiled binaries in a hardware accelerated software transactional memory system | Bratin Saha, Quinn A. Jacobson | 2016-04-05 |
| 9298433 | Optimizing intermediate representation of script code for fast path execution | Guilherme de Lima Ottoni, Michael H. Paleczny | 2016-03-29 |
| 9280397 | Using buffered stores or monitoring to filter redundant transactional accesses and mechanisms for mapping data to buffered metadata | Gad Sheaffer, Bratin Saha, Jan Gray, David Callahan, Burton Smith +1 more | 2016-03-08 |
| 9274855 | Optimization for safe elimination of weak atomicity overhead | Tatiana Shpeisman, Vijay Menon | 2016-03-01 |
| 9195441 | Systems and methods for incremental compilation at runtime using relaxed guards | Guilherme de Lima Ottoni | 2015-11-24 |
| 9195600 | Mechanisms to accelerate transactions using buffered stores | Yang Ni, Bratin Saha, Vadim Bassin, Gad Sheaffer, David Callahan +1 more | 2015-11-24 |
| 9135139 | Methods and systems to identify and reproduce concurrency violations in multi-threaded programs using expressions | Youfeng Wu, Justin E. Gottschlich, Gilles A. Pokam, Shiliang Hu, Cristiano L. Pereira | 2015-09-15 |
| 9069670 | Mechanisms to accelerate transactions using buffered stores | Yang Ni, Bratin Saha, Vadim Bassin, Gad Sheaffer, David Callahan +1 more | 2015-06-30 |
| 9052947 | Unified optimistic and pessimistic concurrency control for a software transactional memory (STM) system | Moshe Maury Bach, Sion Berkowits, James H. Cownie, Yang Ni, Jeffrey V. Olivier +3 more | 2015-06-09 |