Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
ME

Michael Espig — 24 Patents

Intel: 24 patents #1,653 of 30,777Top 6%
Newberg, OR: #11 of 252 inventorsTop 5%
Oregon: #1,754 of 28,073 inventorsTop 7%
Overall (All Time): #168,038 of 4,157,543Top 5%
24 Patents All Time
Michael Espig has been granted 24 US patents while listed as an inventor at Intel. The first was granted in 2013 and the most recent in June 2025. Michael Espig ranks #168,038 of 4,157,543 US inventors in our database (top 4.0%). Patent records list Michael Espig in Newberg, OR, US.

Issued Patents All Time

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12321714 Compressed wallace trees in FMA circuits Aditya Varma, Mahesh Kumashikar 2025-06-03
12287843 Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements Dan Baum, Chen Koren, Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Raanan Sade +3 more 2025-04-29
12182570 Apparatuses, methods, and systems for a packed data convolution instruction with shift control and width control Deepti Aggarwal, Robert Valentine, Sumit Mohan, Prakaram Joshi, Richard R. Winterton 2024-12-31 $16,542,000
12175246 Systems and methods for performing matrix compress and decompress instructions Dan Baum, James D. Guilford, Wajdi K. Feghali, Raanan Sade, Christopher J. Hughes +7 more 2024-12-24 $17,261,000
12099838 Instruction and logic for sum of square differences Deepti Aggarwal, Chekib Nouira, Robert Valentine, Mark J. Charney 2024-09-24 $33,787,000
11886875 Systems and methods for performing nibble-sized operations on matrix elements Elmoustapha Ould-Ahmed-Vall, Jonathan Pearce, Dan Baum, Guei-Yuan Lueh, Christopher J. Hughes +4 more 2024-01-30 $30,721,000
11847185 Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements Dan Baum, Chen Koren, Elmoustapha Ould-Ahmed-Vall, Christopher J. Hughes, Raanan Sade +3 more 2023-12-19 $50,836,000
11836464 Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Aditya Varma 2023-12-05 $33,749,000
11748103 Systems and methods for performing matrix compress and decompress instructions Dan Baum, James D. Guilford, Wajdi K. Feghali, Raanan Sade, Christopher J. Hughes +7 more 2023-09-05 $19,899,000
11507376 Systems for performing instructions for fast element unpacking into 2-dimensional registers Bret L. Toll, Alexander Heinecke, Christopher J. Hughes, Ronen Zohar, Dan Baum +4 more 2022-11-22 $12,862,000
11366636 Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Aditya Varma 2022-06-21 $17,814,000
11327754 Method and apparatus for approximation using polynomials Jorge Parra, Dan Baum, Robert S. Chappell, Varghese George, Alexander Heinecke +5 more 2022-05-10 $19,182,000
11294671 Systems and methods for performing duplicate detection instructions on 2D data Christopher J. Hughes, Dan Baum, Robert Valentine, Bret L. Toll, Elmoustapha Ould-Ahmed-Vall 2022-04-05 $18,322,000
11249761 Systems and methods for performing matrix compress and decompress instructions Dan Baum, James D. Guilford, Wajdi K. Feghali, Raanan Sade, Christopher J. Hughes +7 more 2022-02-15 $14,138,000
10942985 Apparatuses, methods, and systems for fast fourier transform configuration and computation instructions Christopher J. Hughes, Jongsoo Park 2021-03-09 $45,039,000
10922077 Apparatuses, methods, and systems for stencil configuration and computation instructions Christopher J. Hughes 2021-02-16 $35,223,000
10896043 Systems for performing instructions for fast element unpacking into 2-dimensional registers Bret L. Toll, Alexander Heinecke, Christopher J. Hughes, Ronen Zohar, Dan Baum +4 more 2021-01-19 $115,732,000
10719323 Systems and methods for performing matrix compress and decompress instructions Dan Baum, James D. Guilford, Wajdi K. Feghali, Raanan Sade, Christopher J. Hughes +7 more 2020-07-21 $33,796,000
10713012 Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Aditya Varma 2020-07-14 $28,563,000
8762599 Delegating a poll operation to another device Zhen Fang, Ravishankar Iyer, David J. Harriman 2014-06-24 $15,136,000
8649262 Dynamic configuration of potential links between processing elements Sadagopan Srinivasan, Michael W. Leddige, Bin Li 2014-02-11 $23,363,000
8553693 Network controller circuitry to issue at least one portion of packet payload to device in manner that by-passes communication protocol stack involvement Ren Wang, Tsung-Yuan C. Tai, Christian Maciocco, Rajendra Yavatkar, Lakshman Krishnamurthy 2013-10-08 $14,378,000
8495464 Reliability support in memory systems without error correcting code support Henry Stracovsky, Victor W. Lee, Daehyun Kim 2013-07-23 $28,690,000
8364862 Delegating a poll operation to another device Zhen Fang, Ravishankar Iyer, David J. Harriman 2013-01-29 $10,118,000