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USPTO Patent Rankings Data through Dec 31, 2025
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Michael W. Leddige — 34 Patents

Intel: 33 patents #1,107 of 30,777Top 4%
IBM: 1 patents #44,878 of 70,183Top 65%
Beaverton, OR: #157 of 3,140 inventorsTop 5%
Oregon: #1,136 of 28,073 inventorsTop 5%
Overall (All Time): #100,737 of 4,157,543Top 3%
34 Patents All Time
Michael W. Leddige has been granted 34 US patents while listed as an inventor at Intel. The first was granted in 1996 and the most recent in September 2018. Michael W. Leddige ranks #100,737 of 4,157,543 US inventors in our database (top 2.4%). Patent records list Michael W. Leddige in Beaverton, OR, US.

Issued Patents All Time

Showing 1–25 of 34 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10078612 Mode selective balanced encoded interconnect Stephen H. Hall, Chaitanya Sreerama, Olufemi B. Oluwafemi, Antonio Zenteno Ramirez, Maynard C. Falconer 2018-09-18 $29,867,000
9910814 Method, apparatus and system for single-ended communication of transaction layer packets Bryan L. Spry, Su Wei Lim, Mikal C. Hunsaker, Rohit Verma, Lily P. Looi +2 more 2018-03-06 $18,859,000
9632961 Crosstalk aware decoding for a data bus Olufemi B. Oluwafemi, Stephen H. Hall, Jason A. Mix, Earl J. Wight, Chaitanya Sreerama +1 more 2017-04-25 $8,972,000
9391378 High bandwidth connector for internal and external IO interfaces Yun Ling, Kuan-Yu Chen, Kai Wang, Xiang Li, Howard L. Heck 2016-07-12 $10,128,000
9330039 Crosstalk aware encoding for a data bus Stephen H. Hall, Chaitanya Sreerama, Jason A. Mix, Jose A. Sanchez Sanchez, Olufemi B. Oluwafemi +2 more 2016-05-03 $11,131,000
8775991 Interchangeable connection arrays for double-sided DIMM placement Kuljit S. Bains, John T. Sprietsma 2014-07-08 $15,420,000
8649262 Dynamic configuration of potential links between processing elements Sadagopan Srinivasan, Bin Li, Michael Espig 2014-02-11 $23,363,000
8631208 Providing address range coherency capability to a device Zhen Fang, David J. Harriman 2014-01-14 $22,721,000
8438515 Interchangeable connection arrays for double-sided DIMM placement Kuljit S. Bains, John T. Sprietsma 2013-05-07 $21,295,000
8099687 Interchangeable connection arrays for double-sided DIMM placement Kuljit S. Bains, John T. Sprietsma 2012-01-17 $21,678,000
7772708 Stacking integrated circuit dies James A. McCall, Ajit Deosthali, Brad Larson 2010-08-10 $11,211,000
7514773 Systems and arrangements for interconnecting integrated circuit dies James A. McCall 2009-04-07 $17,723,000
7402048 Technique for blind-mating daughtercard to mainboard Pascal Meier, Mohiuddin M. Mazumder, Mark B. Trobough, Alok Tripathi, Ven Holalkere 2008-07-22 $18,979,000
7194572 Memory system and method to reduce reflection and signal degradation James A. McCall 2007-03-20 $12,397,000
7133962 Circulator chain memory command and address bus topology James A. McCall 2006-11-07 $13,207,000
6918078 Systems with modules sharing terminations James A. McCall 2005-07-12 $27,947,000
6891899 System and method for bit encoding to increase data transfer rate Stephen H. Hall 2005-05-10 $20,583,000
6788222 Low weight data encoding for minimal power delivery impact Stephen H. Hall 2004-09-07 $21,424,000
6724082 Systems having modules with selectable on die terminations James A. McCall, Hing Y. To 2004-04-20 $26,995,000
6711640 Split delay transmission line James A. McCall 2004-03-23 $37,745,000
6708243 Computer assembly with stub traces coupled to vias to add capacitance at the vias James A. McCall 2004-03-16 $26,262,000
6686762 Memory module using DRAM package to match channel impedance James A. McCall 2004-02-03 $41,560,000
6631083 Systems with modules and clocking therefore James A. McCall, Hing Y. To 2003-10-07 $52,834,000
6587912 Method and apparatus for implementing multiple memory buses on a memory module Bryce Horine, Randy M. Bonella, Peter D. MacWilliams 2003-07-01 $52,453,000
6539449 Capacitively loaded continuity module James A. McCall 2003-03-25 $42,293,000