| 12476193 |
Routing a communication bus within multiple layers of a printed circuit board |
Xiaoyu Long |
2025-11-18 |
|
| 11428733 |
On-die virtual probes (ODVP) for integrated circuitries |
Yanran Chen, Edward C. Priest, Martin L. Voogel |
2022-08-30 |
|
| 10860776 |
Printed circuit board (PCB) modular design |
John J. Rinck, Juan Wang, Maria George |
2020-12-08 |
$24,793,000 |
| 7954001 |
Nibble de-skew method, apparatus, and system |
Aaron Martin, Mamun Ur Rashid, Joe Salmon |
2011-05-31 |
$17,665,000 |
| 7805627 |
Clock synchronization scheme for deskewing operations in a data interface |
Mamun Ur Rashid |
2010-09-28 |
$14,170,000 |
| 7692457 |
Dual-path clocking architecture |
Roger K. Cheng |
2010-04-06 |
$11,081,000 |
| 7602859 |
Calibrating integrating receivers for source synchronous protocol |
Roger K. Cheng, Harishankar Sridharan, Navneet Dour |
2009-10-13 |
$21,403,000 |
| 7459938 |
Method and apparatus for power efficient and scalable memory interface |
Joe Salmon |
2008-12-02 |
$16,850,000 |
| 7446572 |
Method and system for a configurable Vcc reference and Vss reference differential current mode transmitter |
James A. McCall, Michael Sandhinti |
2008-11-04 |
$14,427,000 |
| 7401246 |
Nibble de-skew method, apparatus, and system |
Aaron Martin, Mamun Ur Rashid, Joe Salmon |
2008-07-15 |
$32,414,000 |
| 7388795 |
Modular memory controller clocking architecture |
Mamun Ur Rashid |
2008-06-17 |
$40,097,000 |
| 7334148 |
Optimization of integrated circuit device I/O bus timing |
Jonathan Liu |
2008-02-19 |
$15,849,000 |
| 7324403 |
Latency normalization by balancing early and late clocks |
Joe Salmon, Mamun Ur Rashid |
2008-01-29 |
$16,660,000 |
| 7245682 |
Determining an optimal sampling clock |
Jen-Tai Hsu, Andrew M. Volk |
2007-07-17 |
$13,694,000 |
| 7243176 |
Method and apparatus for power efficient and scalable memory interface |
Joe Salmon |
2007-07-10 |
$14,625,000 |
| 7194559 |
Slave I/O driver calibration using error-nulling master reference |
Joseph H. Salmon |
2007-03-20 |
$12,397,000 |
| 7117401 |
Method and apparatus for optimizing timing for a multi-drop bus |
Joseph H. Salmon |
2006-10-03 |
$14,661,000 |
| 7010637 |
Single-ended memory interface system |
James A. McCall |
2006-03-07 |
$16,275,000 |
| 6973603 |
Method and apparatus for optimizing timing for a multi-drop bus |
Joseph H. Salmon |
2005-12-06 |
$17,814,000 |
| 6941484 |
Synthesis of a synchronization clock |
Joseph H. Salmon, Michael W. Williams |
2005-09-06 |
$17,626,000 |
| 6885959 |
Circuit and method for calibrating DRAM pullup Ron to pulldown Ron |
Joseph H. Salmon |
2005-04-26 |
$30,166,000 |
| 6771515 |
Systems having modules with on die terminations |
James A. McCall |
2004-08-03 |
$15,005,000 |
| 6747483 |
Differential memory interface system |
James A. McCall |
2004-06-08 |
$20,315,000 |
| 6725390 |
Method and an apparatus for adjusting clock signal to sample data |
Jonathan Liu |
2004-04-20 |
$26,995,000 |
| 6724082 |
Systems having modules with selectable on die terminations |
James A. McCall, Michael W. Leddige |
2004-04-20 |
$26,995,000 |
