Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7941592 | Method and apparatus for high reliability data storage and retrieval operations in multi-level flash cells | Daniel J. Allen, Thomas J. Holman, Chung Lam, Hiroyuki Sakamoto | 2011-05-10 |
| 7681004 | Advanced dynamic disk memory module | Chung Lam | 2010-03-16 |
| 7249232 | Buffering and interleaving data transfer between a chipset and memory modules | John B. Halbert, Jim M. Dodd, Chung Lam | 2007-07-24 |
| 7024518 | Dual-port buffer-to-memory interface | John B. Halbert, James M. Dodd, Chung Lam, Thomas J. Holman | 2006-04-04 |
| 6928571 | Digital system of adjusting delays on circuit boards | John B. Halbert | 2005-08-09 |
| 6928593 | Memory module and memory component built-in self test | John B. Halbert | 2005-08-09 |
| 6820163 | Buffering data transfer between a chipset and memory modules | James A. McCall, John B. Halbert, Jim M. Dodd, Chung Lam | 2004-11-16 |
| 6747887 | Memory module having buffer for isolating stacked memory devices | John B. Halbert | 2004-06-08 |
| 6742098 | Dual-port buffer-to-memory interface | John B. Halbert, James M. Dodd, Chung Lam | 2004-05-25 |
| 6697888 | Buffering and interleaving data transfer between a chipset and memory modules | John B. Halbert, Jim M. Dodd, Chung Lam | 2004-02-24 |
| 6658509 | Multi-tier point-to-point ring memory interface | John B. Halbert | 2003-12-02 |
| 6625687 | Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing | John B. Halbert, Jim M. Dodd, Chung Lam | 2003-09-23 |
| 6587912 | Method and apparatus for implementing multiple memory buses on a memory module | Michael W. Leddige, Bryce Horine, Peter D. MacWilliams | 2003-07-01 |
| 6553450 | Buffer to multiply memory interface | Jim M. Dodd, Michael W. Williams, John B. Halbert, Chung Lam | 2003-04-22 |
| 6530006 | System and method for providing reliable transmission in a buffered memory system | James M. Dodd, Michael W. Williams, John B. Halbert | 2003-03-04 |
| 6493250 | Multi-tier point-to-point buffered memory interface | John B. Halbert, James M. Dodd, Chung Lam | 2002-12-10 |
| 6487102 | Memory module having buffer for isolating stacked memory devices | John B. Halbert | 2002-11-26 |
| 6477614 | Method for implementing multiple memory buses on a memory module | Michael W. Leddige, Bryce Horine, Peter D. MacWilliams | 2002-11-05 |
| 6449213 | Memory interface having source-synchronous command/address signaling | James M. Dodd, Michael W. Williams, John B. Halbert | 2002-09-10 |
| 6397291 | Method and apparatus for retrieving data from a data storage device | Peter D. MacWilliams, Konrad K. Lai | 2002-05-28 |
| 6369605 | Self-terminated driver to prevent signal reflections of transmissions between electronic devices | John B. Halbert | 2002-04-09 |
| 6317352 | Apparatus for implementing a buffered daisy chain connection between a memory controller and memory modules | John B. Halbert, Jim M. Dodd, Chung Lam | 2001-11-13 |
| 6192459 | Method and apparatus for retrieving data from a data storage device | Peter D. MacWilliams, Konrad K. Lai | 2001-02-20 |
| 5818794 | Internally controlled signal system for controlling the operation of a device | Peter D. MacWilliams | 1998-10-06 |
| 5797020 | Bus master arbitration circuitry having improved prioritization | Maria L. Melo | 1998-08-18 |