Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5790869 | Circuit for selectively preventing a microprocessor from posting write cycles | Maria L. Melo, Brian B. Tucker | 1998-08-04 |
| 5625824 | Circuit for selectively preventing a microprocessor from posting write cycles | Maria L. Melo, Brian B. Tucker | 1997-04-29 |
| 5537555 | Fully pipelined and highly concurrent memory controller | John A. Landry, Gary W. Thome, Paul Santeler, Michael J. Collins | 1996-07-16 |
| 5471590 | Bus master arbitration circuitry having improved prioritization | Maria L. Melo | 1995-11-28 |
| 5446863 | Cache snoop latency prevention apparatus | Jeffrey C. Stevens, Jens K. Ramsey, Philip C. Kelly | 1995-08-29 |
| 5404559 | Apparatus for asserting an end of cycle signal to a processor bus in a computer system if a special cycle is detected on the processor bus without taking action on the special cycle | John A. Landry, Gary W. Thome | 1995-04-04 |
| 5333293 | Multiple input frequency memory controller | — | 1994-07-26 |
| 5325503 | Cache memory system which snoops an operation to a first location in a cache line and does not snoop further operations to locations in the same line | Jeffrey C. Stevens, Jens K. Ramsey, Philip C. Kelly | 1994-06-28 |
| 5253358 | Cache memory expansion and transparent interconnection | Roy E. Thoma, III, Joseph P. Miller, Bill Skelton, Mark Taylor | 1993-10-12 |