Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MT

Mark Taylor — 30 Patents

CCCompaq Computer: 18 patents #23 of 1,604Top 2%
ACAllen-Bradley Company: 4 patents #52 of 512Top 15%
RARockwell Automation: 3 patents #1,332 of 4,211Top 35%
IBM: 2 patents #32,909 of 70,183Top 50%
NVIDIA: 2 patents #2,935 of 7,811Top 40%
HP: 1 patents #11,359 of 16,619Top 70%
Chesterland, OH: #5 of 230 inventorsTop 3%
Ohio: #1,786 of 73,341 inventorsTop 3%
Overall (All Time): #121,623 of 4,157,543Top 3%
30 Patents All Time
Mark Taylor has been granted 30 US patents while listed as an inventor at Compaq Computer. The first was granted in 1989 and the most recent in December 2017. Mark Taylor ranks #121,623 of 4,157,543 US inventors in our database (top 2.9%). Patent records list Mark Taylor in Chesterland, OH, US.

Issued Patents All Time

Showing 1–25 of 30 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9847891 System and method for detecting reuse of an existing known high-speed serial interconnect link David Wyatt, Vishal Mehta, Michael Hopgood, Hitendra Dutt, Samuel Vincent +1 more 2017-12-19 $566,156,000
9250897 Systems and methods that facilitate management of add-on instruction generation, selection, and/or monitoring during execution James Harry Jarrett, John E. Belcher, Russell W. Brandes, Jeffery W. Brooks, Bruce A. Christensen +6 more 2016-02-02 $19,851,000
8949497 Method and apparatus for interleaving bursts of high-speed serial interconnect link training with bus data transactions Michael Hopgood, Wei-Je Huang, Hitendra Dutt, David Wyatt, Vishal Mehta 2015-02-03 $4,737,000
8393004 Systems and methods for protecting information used by mobile devices Wael Ibrahim 2013-03-05 $3,690,000
8365145 Systems and methods that facilitate management of add-on instruction generation, selection, and/or monitoring during execution James Harry Jarrett, John E. Belcher, Russell W. Brandes, Jeffery W. Brooks, Bruce A. Christensen +6 more 2013-01-29 $28,441,000
7680900 Publish/subscribe messaging system John J. Duigenan, Graham Derek Wallis 2010-03-16 $7,988,000
7457671 Systems and methods that facilitate management of add-on instruction generation, selection, and/or monitoring during execution James Harry Jarrett, John E. Belcher, Russell W. Brandes, Jeffery W. Brooks, Bruce A. Christensen +6 more 2008-11-25 $11,602,000
7412493 Publish/subscribe messaging system John J. Duigenan, Graham Derek Wallis 2008-08-12 $8,244,000
6125449 Controlling power states of a computer Larry W. Kunkel, Gokalp Bayramoglu, Henry M. D'Souza, Valiuddin Y. Ali 2000-09-26 $63,796,000
6076133 Computer interface with hardwire button array James W. Brainard, Larry W. Kunkel, Stephen A. Walsh, Michael A. Provencher 2000-06-13 $91,754,000
6018620 Double buffering operations between the memory bus and the expansion bus of a computer system Paul R. Culley 2000-01-25 $211,253,000
5987537 Function selector with external hard wired button array on computer chassis that generates interrupt to system processor James W. Brainard, Larry W. Kunkel, Stephen A. Walsh, Michael A. Provencher 1999-11-16 $47,020,000
5966301 Redundant processor controller providing upgrade recovery William B. Cook, Mark A. Flood, Steven P. Richter, Bradley J. Bittorf 1999-10-12
5966300 Redundant automation controller with deductive power-up Mark A. Flood, William B. Cook, Steven P. Richter 1999-10-12
5966304 Redundant automation controller permitting replacement of components during operation William B. Cook, Mark A. Flood 1999-10-12
5963448 Industrial controller having redundancy and using connected messaging and connection identifiers to enable rapid switchover without requiring new connections to be opened or closed at switchover Mark A. Flood 1999-10-05
5870568 Double buffering operations between the memory bus and the expansion bus of a computer system Paul R. Culley 1999-02-09 $155,737,000
5870602 Multi-processor system with system wide reset and partial system reset capabilities David A. Miller, Kenneth A. Jansen, Paul R. Culley, Javier F. Izquierdo 1999-02-09 $155,737,000
5751998 Memory accessing system with portions of memory being selectively write protectable and relocatable based on predefined register bits and memory selection RAM outputs Russell J. Wunderlich, Charles J. Stancil, Mikal C. Hunsaker, Brian V. Belmont 1998-05-12 $74,599,000
5737604 Method and apparatus for independently resetting processors and cache controllers in multiple processor systems David A. Miller, Kenneth A. Jansen, Paul R. Culley, Javier F. Izquierdo 1998-04-07 $67,886,000
5611078 Method and apparatus for independently resetting processors and cache controllers in multiple processor systems David A. Miller, Kenneth A. Jansen, Paul R. Culley, Javier F. Izquierdo 1997-03-11 $48,908,000
5553310 Split transactions and pipelined arbitration of microprocessors in multiprocessing computer systems Paul R. Culley, Maria L. Melo, Roger E. Tipley 1996-09-03 $52,821,000
5535395 Prioritization of microprocessors in multiprocessor computer systems Roger E. Tipley, Michael Moriarty 1996-07-09 $39,423,000
5519839 Double buffering operations between the memory bus and the expansion bus of a computer system Paul R. Culley 1996-05-21 $44,414,000
5465360 Method and apparatus for independently resetting processors and cache controllers in multiple processor systems David A. Miller, Kenneth A. Jansen, Paul R. Culley, Javier F. Izquierdo 1995-11-07 $136,128,000