Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 12321714 | Compressed wallace trees in FMA circuits | Mahesh Kumashikar, Michael Espig | 2025-06-03 | |
| 11836464 | Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits | Michael Espig | 2023-12-05 | $33,749,000 |
| 11366636 | Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits | Michael Espig | 2022-06-21 | $17,814,000 |
| 10713012 | Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits | Michael Espig | 2020-07-14 | $28,563,000 |