Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9733939 | Physical reference list for tracking physical register sharing | Vijaykumar B. Kadgi, James Hadley, Avinash Sodani, Matthew C. Merten, Morris Marden +4 more | 2017-08-15 |
| 9619750 | Method and apparatus for store dependence prediction | Ho-Seop Kim, Choon Yip Soo | 2017-04-11 |
| 9563455 | Virtualization exceptions | Gilbert Neiger, Mayank Bomb, Manohar R. Castelino, David M. Durham, Barry E. Huntley +5 more | 2017-02-07 |
| 9558127 | Instruction and logic for a cache prefetcher and dataless fill buffer | Stanislav Shwartsman, Ronak Singhal, Ryan Carlson, Raanan Sade, Omar M. Shaikh +2 more | 2017-01-31 |
| 9524263 | Method and apparatus for bus lock assistance | John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parathasarthy, David William Burns | 2016-12-20 |
| 9423959 | Method and apparatus for store durability and ordering in a persistent memory architecture | Subramanya R. Dulloor, Sanjay Kumar, Rajesh M. Sankaran, Gilbert Neiger, Richard Uhlig +7 more | 2016-08-23 |
| 9348766 | Balanced P-LRU tree for a “multiple of 3” number of ways cache | Adi Basel, Gur Hildesheim, Shlomo Raikin, Ho-Seop Kim, Rohit Bhatia | 2016-05-24 |
| 9311241 | Method and apparatus to write modified cache data to a backing store while retaining write permissions | Ravi Rajwar, Zhongying Zhang, Jason Anthony Bessette | 2016-04-12 |
| 9298632 | Hybrid cache state and filter tracking of memory operations during a transaction | Ravi Rajwar, Zhongying Zhang, Jason Anthony Bessette | 2016-03-29 |
| 9244827 | Store address prediction for memory disambiguation in a processing device | Ho-Seop Kim, Choon Yip Soo, Srikanth Srinivasan | 2016-01-26 |
| 9069690 | Concurrent page table walker control for TLB miss handling | Gur Hildesheim, Chang Kian Tan, Rohit Bhatia | 2015-06-30 |
| 8838935 | Apparatus, method, and system for implementing micro page tables | Glenn Hinton, Madhavan Parthasarathy, Rajesh S. Parthasarathy, Muthukumar P. Swaminathan, Raj K. Ramanujan +5 more | 2014-09-16 |
| 8631207 | Cache memory power reduction techniques | Zhen Fang, Meenakshisundara R. Chinthamani, Li Zhao, Milind B. Kamble, Ravishankar Iyer +2 more | 2014-01-14 |
| 8516577 | Regulating atomic memory operations to prevent denial of service attack | Michael S. Bair, David William Burns, Prakash Math, Leslie A. Ong, Pankaj Raghuvanshi +4 more | 2013-08-20 |