Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417470 | Machine learning systems for optimizing audio advertisements | Daniel N. MacTiernan, Laurence B. Linietsky | 2025-09-16 |
| 11218490 | System and method for directory decentralization | Teekam Chand Goyal, Deepak Pratinidhi, Rajiv Kumar, Prashant Gupta, Rakesh Midha +3 more | 2022-01-04 |
| 10956929 | Systems and methods for instant generation of human understandable audience insights | Zornitsa Kozareva, Lin Ma | 2021-03-23 |
| 10055753 | Systems and methods for instant generation of human understandable audience insights | Zomitsa Kozareva, Lin Ma | 2018-08-21 |
| 9848089 | Methods and apparatus to generate an overall performance index | Amilcar Pérez, Michael Greenawald, Kunal Barai, Joel Ullmann, Austin William Albino | 2017-12-19 |
| 9348766 | Balanced P-LRU tree for a “multiple of 3” number of ways cache | Adi Basel, Gur Hildesheim, Shlomo Raikin, Robert S. Chappell, Ho-Seop Kim | 2016-05-24 |
| 9069690 | Concurrent page table walker control for TLB miss handling | Gur Hildesheim, Chang Kian Tan, Robert S. Chappell | 2015-06-30 |
| 9009630 | Above-lock notes | Michael J. Kruzeniski, Joseph B. Tobens, Jon Bell, William Scott Stauber, Ram P. Papatla +1 more | 2015-04-14 |
| 8886979 | Methods and apparatuses for reducing step loads of processors | Kevin Safford, Chris Bostak, Richard Blumberg, Blaine Stackhouse, Steve Undy | 2014-11-11 |
| 8538849 | Methods and systems regarding volatility risk premium index | Michael Schmanske, Maneesh Deshpande, Yidong Ding, Pankaj Khandelwal | 2013-09-17 |
| 8479029 | Methods and apparatuses for reducing step loads of processors | Kevin Safford, Chris Bostak, Richard Blumberg, Blaine Stackhouse, Steve Undy | 2013-07-02 |
| 8219780 | Mitigating context switch cache miss penalty | James Callister, Eric Delano, Shawn Walker, Mark Gibson | 2012-07-10 |
| 7992017 | Methods and apparatuses for reducing step loads of processors | Kevin Safford, Chris Bostak, Richard Blumberg, Blaine Stackhouse, Steve Undy | 2011-08-02 |
| 7930539 | Computer system resource access control | Donald Soltis, Eric Delano | 2011-04-19 |
| 7856636 | Systems and methods of sharing processing resources in a multi-threading environment | Don Soltis | 2010-12-21 |
| 7634508 | Processing of duplicate records having master/child relationship with other records | Subodh Kumar, Nitin Mukhija, Abhishek Agarwal | 2009-12-15 |
| 7421689 | Processor-architecture for facilitating a virtual machine monitor | Jonathan Ross, Dale Morris, Donald Soltis, Eric Delano | 2008-09-02 |
| 7409524 | System and method for responding to TLB misses | Kevin Safford, Karl Brummel | 2008-08-05 |
| 7213134 | Using thread urgency in determining switch events in a temporal multithreaded processor unit | Donald Soltis | 2007-05-01 |
| 6910122 | Method and apparatus for preserving pipeline data during a pipeline stall and for recovering from the pipeline stall | Stephen Bass | 2005-06-21 |
| 6823434 | System and method for resetting and initializing a fully associative array to a known state at power on or through machine specific state | David Paul Hannum | 2004-11-23 |
| 6807625 | Method and apparatus for efficiently generating, storing, and consuming arithmetic flags between producing and consuming macroinstructions when emulating with microinstructions | Patrick Knebel, Mark Gibson, Kevin Safford | 2004-10-19 |
| 6775752 | System and method for efficiently updating a fully associative array | David Paul Hannum | 2004-08-10 |
| 6745322 | Apparatus and method for conditionally flushing a pipeline upon a failure of a test condition | Russell C. Brockmann, Patrick Knebel, Kevin Safford | 2004-06-01 |
| 6707831 | Mechanism for data forwarding | Eric Fetzer, Mark Gibson | 2004-03-16 |