Issued Patents All Time
Showing 51–75 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8521969 | Apparatus and method for directing micro architectural memory region accesses | Martin G. Dixon, James P. Held, Bill Alexander, Larry Smith, Scott H. Robinson +1 more | 2013-08-27 |
| 8473642 | PCI express enhancements and extensions including device window caching | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2013-06-25 |
| 8464035 | Instruction for enabling a processor wait state | Martin G. Dixon, Taraneh Bahrami, Stephen H. Gunther, Prashant Sethi, Per Hammarlund | 2013-06-11 |
| 8447888 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2013-05-21 |
| 8402252 | Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2013-03-19 |
| 8230119 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2012-07-24 |
| 8230120 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2012-07-24 |
| 8214574 | Event handling for architectural events at high privilege levels | Gautham Chinya, Hong Wang, Chris J. Newburn | 2012-07-03 |
| 8214598 | System, method, and apparatus for a cache flush of a range of pages and TLB invalidation of a range of entries | Martin G. Dixon | 2012-07-03 |
| 8161269 | Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2012-04-17 |
| 8099523 | PCI express enhancements and extensions including transactions having prefetch parameters | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2012-01-17 |
| 8079034 | Optimizing processor-managed resources based on the behavior of a virtual machine monitor | Steven M. Bennett, Andrew V. Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger +3 more | 2011-12-13 |
| 8073981 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2011-12-06 |
| 7966476 | Determining length of instruction with escape and addressing form bytes without evaluating opcode | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2011-06-21 |
| 7949794 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2011-05-24 |
| 7930566 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2011-04-19 |
| 7917734 | Determining length of instruction with multiple byte escape code based on information from other than opcode byte | James S. Coke, Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov +2 more | 2011-03-29 |
| 7899943 | PCI express enhancements and extensions | Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more | 2011-03-01 |
| 7849465 | Programmable event driven yield mechanism which may activate service threads | Xiang Zou, Hong Wang, Darrell D. Boggs, Bryant Bigbee, Shivanandan Kaushik +8 more | 2010-12-07 |
| 7743233 | Sequencer address management | Hong Wang, Gautham Chinya, Richard Hankins, Shivnandan Kaushik, Bryant Bigbee +13 more | 2010-06-22 |
| 7448025 | Qualification of event detection by thread ID and thread privilege level | Stavros Kalafatis, Micheal Cranford, Brinkley Sprunt | 2008-11-04 |
| 7430578 | Method and apparatus for performing multiply-add operations on packed byte data | Eric L. Debes, William W. Macy, Jonathan J. Tyler, James S. Coke, Frank Binns +5 more | 2008-09-30 |
| 7424709 | Use of multiple virtual machine monitors to handle privileged events | Gilbert Neiger, Steven M. Bennett, Alain Kagi, Stalinselvaraj Jeyasingh, Andrew V. Anderson +3 more | 2008-09-09 |
| 7287197 | Vectoring an interrupt or exception upon resuming operation of a virtual machine | Steven M. Bennett, Andrew V. Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger +3 more | 2007-10-23 |
| 5948097 | Method and apparatus for changing privilege levels in a computer system without use of a call gate | Andrew F. Glew | 1999-09-07 |