SK

Stavros Kalafatis

IN Intel: 13 patents #3,143 of 30,777Top 15%
Overall (All Time): #387,805 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7448025 Qualification of event detection by thread ID and thread privilege level Micheal Cranford, Scott Dion Rodgers, Brinkley Sprunt 2008-11-04
6981261 Method and apparatus for thread switching within a multithreaded processor Alan B. Kyker, Robert D. Fisch 2005-12-27
6971104 Method and system to perform a thread switching operation within a multithreaded processor based on dispatch of a quantity of instruction information for a full instruction Alan B. Kyker, Robert D. Fisch 2005-11-29
6865740 Method and system to insert a flow marker into an instruction stream to indicate a thread switching operation within a multithreaded processor Alan B. Kyker, Robert D. Fisch 2005-03-08
6854118 Method and system to perform a thread switching operation within a multithreaded processor based on detection of a flow marker within an instruction information Alan B. Kyker, Robert D. Fisch 2005-02-08
6850961 Method and system to perform a thread switching operation within a multithreaded processor based on detection of a stall condition Alan B. Kyker, Robert D. Fisch 2005-02-01
6795845 Method and system to perform a thread switching operation within a multithreaded processor based on detection of a branch instruction Alan B. Kyker, Robert D. Fisch 2004-09-21
6785890 Method and system to perform a thread switching operation within a multithreaded processor based on detection of the absence of a flow of instruction information for a thread Alan B. Kyker, Robert D. Fisch 2004-08-31
6535905 Method and apparatus for thread switching within a multithreaded processor Alan B. Kyker, Robert D. Fisch 2003-03-18
6374350 System and method of maintaining and utilizing multiple return stack buffers Reynold V. D'Sa, Rebecca E. Hebda, Alan B. Kyker, Robert B. Chaput 2002-04-16
6151671 System and method of maintaining and utilizing multiple return stack buffers Reynold V. D'Sa, Rebecca E. Hebda, Alan B. Kyker, Robert B. Chaput 2000-11-21
6055630 System and method for processing a plurality of branch instructions by a plurality of storage devices and pipeline units Reynold V. D'Sa, Alan B. Kyker, Gad Sheaffer, Gustavo P. Espinosa, Rebecca E. Hebda 2000-04-25
5546434 Dual edge adjusting digital phase-locked loop having one-half reference clock jitter 1996-08-13