Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12164370 | Power error monitoring and reporting within a system on chip for functional safety | Prashant D. Chaudhari, Bradley T. Coffman, Ivan Herrera Mejia | 2024-12-10 |
| 11669385 | Power error monitoring and reporting within a system on chip for functional safety | Prashant D. Chaudhari, Bradley T. Coffman, Ivan Herrera Mejia | 2023-06-06 |
| 11544160 | IPS SOC PLL monitoring and error reporting | Prashant D. Chaudhari, Michael N. Derr, Bradley T. Coffman, Arthur J. Runyan, Daniel James Knollmueller +1 more | 2023-01-03 |
| 10824529 | Functional safety system error injection technology | Prashant D. Chaudhari, Michael N. Derr, Balaji Vembu, Richard James Shannon, Bradley T. Coffman +1 more | 2020-11-03 |
| 10749547 | Error detector and/or corrector checker method and apparatus | Prashant D. Chaudhari, Michael N. Derr, Daren J. Schmidt | 2020-08-18 |
| 10678623 | Error reporting and handling using a common error handler | Michael N. Derr, Balaji Vembu, Michael Mishaeli, Brent Chartrand, Bryan R. White +1 more | 2020-06-09 |
| 9348767 | Accessing private data about the state of a data processing machine from storage that is publicly accessible | Scott H. Robinson, Steven M. Bennett | 2016-05-24 |
| 9087000 | Accessing private data about the state of a data processing machine from storage that is publicly accessible | Scott H. Robinson, Steven M. Bennett | 2015-07-21 |
| 8156343 | Accessing private data about the state of a data processing machine from storage that is publicly accessible | Scott H. Robinson, Steven M. Bennett | 2012-04-10 |
| 6772293 | System and method for optimizing memory bus bandwidth utilization by request classification and ordering | Ramacharan Sundararaman, Junseong Kim, Ryan Carlson | 2004-08-03 |
| 6766449 | Method and apparatus for dynamic processor configuration by limiting a processor array pointer | Meera Jitendra Agrawal, Kjeld Svendsen, Bryan C. Tipton | 2004-07-20 |
| 6715064 | Method and apparatus for performing sequential executions of elements in cooperation with a transform | Reynold V. D'Sa, Slade Morgan, Alan B. Kyker, Gad Sheaffer | 2004-03-30 |
| 6055630 | System and method for processing a plurality of branch instructions by a plurality of storage devices and pipeline units | Reynold V. D'Sa, Alan B. Kyker, Gad Sheaffer, Stavros Kalafatis, Rebecca E. Hebda | 2000-04-25 |