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USPTO Patent Rankings Data through Dec 31, 2025
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Reynold V. D'Sa — 15 Patents

Intel: 15 patents #2,763 of 30,777Top 9%
Beaverton, OR: #407 of 3,140 inventorsTop 15%
Oregon: #2,909 of 28,073 inventorsTop 15%
Overall (All Time): #307,048 of 4,157,543Top 8%
15 Patents All Time
Reynold V. D'Sa has been granted 15 US patents while listed as an inventor at Intel. The first was granted in 1996 and the most recent in February 2008. Reynold V. D'Sa ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Reynold V. D'Sa in Beaverton, OR, US.

Patents per Year

Patents granted per year, 1996 to 2008Bar chart with a peak of 3 patents in 1998.peak 31996: 1 patents19961997: 1 patents19971998: 3 patents19981999: 3 patents19992000: 3 patents20002002: 2 patents20022004: 1 patents20042008: 1 patents2008

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
7334115 Detection, recovery and prevention of bogus branches Alan B. Kyker, Slade Morgan, Rebecca E. Hebda, Richard A. Weier, Robert F. Krick 2008-02-19 $15,849,000
6715064 Method and apparatus for performing sequential executions of elements in cooperation with a transform Slade Morgan, Alan B. Kyker, Gad Sheaffer, Gustavo P. Espinosa 2004-03-30 $39,781,000
6493821 Recovery from writeback stage event signal or micro-branch misprediction using instruction sequence number indexed state information table Robert F. Krick, Rebecca E. Hebda, Alan B. Kyker 2002-12-10 $69,846,000
6374350 System and method of maintaining and utilizing multiple return stack buffers Rebecca E. Hebda, Stavros Kalafatis, Alan B. Kyker, Robert B. Chaput 2002-04-16 $77,675,000
6151671 System and method of maintaining and utilizing multiple return stack buffers Rebecca E. Hebda, Stavros Kalafatis, Alan B. Kyker, Robert B. Chaput 2000-11-21 $211,011,000
6055630 System and method for processing a plurality of branch instructions by a plurality of storage devices and pipeline units Alan B. Kyker, Gad Sheaffer, Gustavo P. Espinosa, Stavros Kalafatis, Rebecca E. Hebda 2000-04-25 $208,912,000
6014742 Trace branch prediction unit Robert F. Krick, Chan Woo Lee 2000-01-11 $302,834,000
5944817 Method and apparatus for implementing a set-associative branch target buffer Bradley D. Hoyt, Glenn Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1999-08-31 $176,323,000
5918046 Method and apparatus for a branch instruction pointer table Bradley D. Hoyt, Glenn J. Hinton, David B. Papworth, Subramanian Natarajan 1999-06-29 $133,089,000
5903751 Method and apparatus for implementing a branch target buffer in CISC processor Bradley D. Hoyt, Glenn J. Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1999-05-11 $87,534,000
5812839 Dual prediction branch system having two step of branch recovery process which activated only when mispredicted branch is the oldest instruction in the out-of-order unit Bradley D. Hoyt, Glenn J. Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1998-09-22 $64,376,000
5768576 Method and apparatus for predicting and handling resolving return from subroutine instructions in a computer processor Bradley D. Hoyt, Glenn J. Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1998-06-16 $42,844,000
5706492 Method and apparatus for implementing a set-associative branch target buffer Bradley D. Hoyt, Glenn Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1998-01-06 $96,219,000
5604877 Method and apparatus for resolving return from subroutine instructions in a computer processor Bradley D. Hoyt, Glenn J. Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1997-02-18 $59,389,000
5574871 Method and apparatus for implementing a set-associative branch target buffer Bradley D. Hoyt, Glenn J. Hinton, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman +2 more 1996-11-12 $38,860,000