Issued Patents All Time
Showing 1–25 of 84 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12362002 | Staggered read recovery for improved read window budget in a three dimensional (3D) NAND memory array | Rifat Ferdous, Rohit S. Shenoy, Ali Khakifirooz, Dipanjan Basu | 2025-07-15 |
| 12029041 | Method of forming high-voltage transistor with thin gate poly | Chun Chen, James Pak, Unsoon Kim, Inkuk Kang, Kuo-Tung Chang | 2024-07-02 |
| 11690227 | Method of forming high-voltage transistor with thin gate poly | Chun Chen, James Pak, Unsoon Kim, Inkuk Kang, Kuo-Tung Chang | 2023-06-27 |
| 11587874 | Resistance reduction for word lines in memory arrays | Pranav Kalavade, Owen W. Jungroth, Prasanna Srinivasan | 2023-02-21 |
| 10872898 | Embedded non-volatile memory device and fabrication method of the same | Chun Chen, James Pak, Unsoon Kim, Inkuk Kang, Kuo-Tung Chang | 2020-12-22 |
| 10497710 | Split-gate flash cell formed on recessed substrate | James Pak, Unsoon Kim, Inkuk Kang, Chun Chen, Kuo-Tung Chang | 2019-12-03 |
| 10242996 | Method of forming high-voltage transistor with thin gate poly | Chun Chen, James Pak, Unsoon Kim, Inkuk Kang, Kuo-Tung Chang | 2019-03-26 |
| 10153349 | Methods and structures for a split gate memory cell structure | Cheong Min Hong | 2018-12-11 |
| 9853039 | Split-gate flash cell formed on recessed substrate | James Pak, Unsoon Kim, Inkuk Kang, Chun Chen, Kuo-Tung Chang | 2017-12-26 |
| 9685339 | Scalable split gate memory cell array | Jane A. Yater, Cheong Min Hong, Ronald J. Syzdek | 2017-06-20 |
| 9590058 | Methods and structures for a split gate memory cell structure | Cheong Min Hong | 2017-03-07 |
| 9397201 | Non-volatile memory (NVM) cell and a method of making | Jacob T. Williams, Cheong Min Hong, David G. Kolar, Jane A. Yater | 2016-07-19 |
| 9368499 | Method of forming different voltage devices with high-k metal gate | Cheong Min Hong, Asanga H. Perera | 2016-06-14 |
| 9356106 | Method to form self-aligned high density nanocrystals | Euhngi Lee | 2016-05-31 |
| 9331092 | Methods for forming contact landing regions in split-gate non-volatile memory (NVM) cell arrays | Jane A. Yater, Cheong Min Hong | 2016-05-03 |
| 9318568 | Integration of a non-volatile memory (NVM) cell and a logic transistor and method therefor | Asanga H. Perera | 2016-04-19 |
| 9275864 | Method to form a polysilicon nanocrystal thin film storage bitcell within a high k metal gate platform technology using a gate last process to form transistor gates | Asanga H. Perera, Jane A. Yater, Cheong Min Hong | 2016-03-01 |
| 9252246 | Integrated split gate non-volatile memory cell and logic device | Asanga H. Perera, Cheong Min Hong, Jane A. Yater | 2016-02-02 |
| 9219167 | Non-volatile memory (NVM) cell | Jacob T. Williams, Cheong Min Hong, David G. Kolar, Jane A. Yater | 2015-12-22 |
| 9165652 | Split-gate memory cells having select-gate sidewall metal silicide regions and related manufacturing methods | Cheong Min Hong | 2015-10-20 |
| 9142566 | Method of forming different voltage devices with high-K metal gate | Cheong Min Hong, Asanga H. Perera | 2015-09-22 |
| 9129855 | Non-volatile memory (NVM) and high-k and metal gate integration using gate-first methodology | Asanga H. Perera, Cheong Min Hong, Jane A. Yater | 2015-09-08 |
| 9112047 | Split gate non-volatile memory (NVM) cell and method therefor | Cheong Min Hong | 2015-08-18 |
| 9082650 | Integrated split gate non-volatile memory cell and logic structure | Asanga H. Perera, Cheong Min Hong, Byoung W. Min, Jane A. Yater | 2015-07-14 |
| 9054208 | Methods for forming contact landing regions in split-gate non-volatile memory (NVM) cell arrays | Jane A. Yater, Cheong Min Hong | 2015-06-09 |