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USPTO Patent Rankings Data through Dec 31, 2025
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Pranav Kalavade — 93 Patents

Intel: 59 patents #505 of 30,777Top 2%
Micron: 28 patents #679 of 6,374Top 15%
ASAgere Systems: 2 patents #639 of 1,849Top 35%
SSSk Hynix Nand Product Solutions: 2 patents #26 of 148Top 20%
San Jose, CA: #307 of 32,062 inventorsTop 1%
California: #2,610 of 386,348 inventorsTop 1%
Overall (All Time): #16,773 of 4,157,543Top 1%
93 Patents All Time
Pranav Kalavade has been granted 93 US patents while listed as an inventor at Intel. The first was granted in 2003 and the most recent in November 2025. Pranav Kalavade ranks #16,773 of 4,157,543 US inventors in our database (top 0.40%). Patent records list Pranav Kalavade in San Jose, CA, US.

Issued Patents All Time

Showing 1–25 of 93 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12482523 Configuration of a memory device for programming memory cells Violante Moschiano, Purval S. Sule, Han Liu, Andrea D'Alessandro, Han Zhao +1 more 2025-11-25
12340847 Flash memory chip that modulates its program step voltage as a function of chip temperature Arash Hazeghi, Rohit S. Shenoy, Hsiao-Yu Chang 2025-06-24
12334152 Simultaneous programming of multiple sub-blocks in NAND memory structures Ali Khakifirooz, Shantanu R. Rajwade, Tarek Ahmed Ameen Beshari 2025-06-17
12243590 Method and apparatus for improving write uniformity in a memory device Shantanu R. Rajwade, Christian Mion, Rohit S. Shenoy, Xin Sun, Kristopher H. Gaewsky 2025-03-04
12224019 Cache processes with adaptive dynamic start voltage calculation for memory devices Xiang Yang, Ali Khakifirooz, Shantanu R. Rajwade 2025-02-11
12106815 Variable error correction codeword packing to support bit error rate targets Ravi H. Motwani, Rohit S. Shenoy, Rifat Ferdous 2024-10-01 $20,560,000
11923010 Flash memory chip that modulates its program step voltage as a function of chip temperature Arash Hazeghi, Rohit S. Shenoy, Hsiao-Yu Chang 2024-03-05
11721396 Configuration of a memory device for programming memory cells Violante Moschiano, Purval S. Sule, Han Liu, Andrea D'Alessandro, Han Zhao +1 more 2023-08-08 $8,604,000
11698725 Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation Shantanu R. Rajwade, Toru Tanzawa 2023-07-11 $14,705,000
11625191 Apparatuses, systems, and methods for heating a memory device Arash Hazeghi, Rohit S. Shenoy, Krishna K. Parat 2023-04-11 $27,486,000
11587874 Resistance reduction for word lines in memory arrays Sung-Taeg Kang, Owen W. Jungroth, Prasanna Srinivasan 2023-02-21 $13,703,000
11429469 Defective bit line management in connection with a memory access Ali Khakifirooz, Ravi H. Motwani, Chang Wan Ha 2022-08-30 $13,077,000
11315644 String current reduction during multistrobe sensing to reduce read disturb Rohit S. Shenoy, Golnaz Karbasian 2022-04-26 $25,630,000
11270778 Method and system for reducing program disturb degradation in flash memory Han Zhao, Krishna K. Parat 2022-03-08 $16,017,000
11182074 Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation Shantanu R. Rajwade, Toru Tanzawa 2021-11-23 $21,765,000
11056203 Boosted bitlines for storage cell programmed state verification in a memory array Xiang Yang, Ali Khakifirooz, Shantanu R. Rajwade, Sagar Upadhyay 2021-07-06 $31,309,000
11029861 Sense flags in a memory device Shafqat Ahmed, Khaled Hasnat, Krishna K. Parat, Aaron Yip, Mark A. Helm +1 more 2021-06-08 $24,475,000
10942799 Defective bit line management in connection with a memory access Ali Khakifirooz, Ravi H. Motwani, Chang Wan Ha 2021-03-09 $45,039,000
10871903 Achieving consistent read times in multi-level non-volatile memory Anand S. Ramalingam 2020-12-22 $47,741,000
10839916 One-sided soft reads Zion S. Kwok, Ravi H. Motwani 2020-11-17 $36,756,000
10832766 Program verification time reduction in non-volatile memory devices Ali Khakifirooz, Uday Chandrasekhar, Trupti Bemalkhedkar, Chang Wan Ha 2020-11-10 $31,576,000
10777277 Configuration of a memory device for programming memory cells Violante Moschiano, Purval S. Sule, Han Liu, Andrea D'Alessandro, Han Zhao +1 more 2020-09-15 $12,657,000
10699790 Erase and soft program for vertical NAND flash Krishna K. Parat, Koichi Kawai, Akira Goda 2020-06-30 $33,333,000
10658053 Ramping inhibit voltage during memory programming Shantanu R. Rajwade, Neal R. Mielke, Krishna K. Parat, Shyam Sunder Raghunathan 2020-05-19 $31,576,000
10629271 Method and system for reducing program disturb degradation in flash memory Han Zhao, Krishna K. Parat 2020-04-21 $45,742,000