Issued Patents All Time
Showing 1–25 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12293790 | Memory for programming data states of memory cells | Yoshihiko Kamata, Akira Goda | 2025-05-06 |
| 12165710 | Memory devices using a dynamic latch to provide multiple bias voltages | Yoshihiko Kamata | 2024-12-10 |
| 12136607 | Semiconductor devices including stacked dies with interleaved wire bonds and associated systems and methods | Raj K. Bansal, Takehiro Hasegawa, Chang Hua Siau | 2024-11-05 |
| 11922993 | Read-time overhead and power optimizations with command queues in memory device | Sundararajan Sankaranarayanan, Eric N. Lee, Akira Goda | 2024-03-05 |
| 11778827 | Memory devices including multiplexer devices, and related electronic systems | Yoshihiko Kamata, Yoshiaki Fukuzumi, Tamotsu Murakoshi | 2023-10-03 |
| 11568921 | Read-time overhead and power optimizations with command queues in memory device | Sundararajan Sankaranarayanan, Eric N. Lee, Akira Goda | 2023-01-31 |
| 11393845 | Microelectronic devices, and related memory devices and electronic systems | Yoshihiko Kamata, Yoshiaki Fukuzumi, Tamotsu Murakoshi | 2022-07-19 |
| 11295823 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2022-04-05 |
| 10741266 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2020-08-11 |
| 10699790 | Erase and soft program for vertical NAND flash | Krishna K. Parat, Pranav Kalavade, Akira Goda | 2020-06-30 |
| 10410731 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2019-09-10 |
| 10290356 | Erase and soft program for vertical NAND flash | Krishna K. Parat, Pranav Kalavade, Akira Goda | 2019-05-14 |
| 9870831 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2018-01-16 |
| 9823880 | Method and apparatus for initiating pre-read operation before completion of data load operation | Tomoharu Tanaka | 2017-11-21 |
| 9653171 | Partial page memory operations | Michael Abraham, Tomoharu Tanaka, Yuichi Einaga | 2017-05-16 |
| 9536610 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2017-01-03 |
| 9536582 | Enable/disable of memory chunks during memory access | Toru Tanzawa, Satoru Tamada, Tetsuji Manabe | 2017-01-03 |
| 9318199 | Partial page memory operations | Michael Abraham, Tomoharu Tanaka, Yuichi Einaga | 2016-04-19 |
| 9312023 | Devices and methods of programming memory cells | Koji Sakui, Peter Feeley | 2016-04-12 |
| 9305654 | Erase and soft program for vertical NAND flash | Krishna K. Parat, Pranav Kalavade, Akira Goda | 2016-04-05 |
| 9064578 | Enable/disable of memory chunks during memory access | Toru Tanzawa, Satoru Tamada, Tetsuji Manabe | 2015-06-23 |
| 8743625 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2014-06-03 |
| 8537623 | Devices and methods of programming memory cells | Koji Sakui, Peter Feeley | 2013-09-17 |
| 8514624 | In-field block retiring | Krishna K. Parat, Akira Goda, Brian J. Soderling, Jeremy Binfet, Arnaud A. Furnemont +3 more | 2013-08-20 |
| 8477541 | Semiconductor integrated circuit adapted to output pass/fail results of internal operations | Hiroshi Nakamura, Kenichi Imamiya, Toshio Yamamura, Koji Hosono | 2013-07-02 |