Issued Patents All Time
Showing 26–50 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10482974 | Operation of a memory device during programming | Violante Moschiano, Purval S. Sule, Han Liu, Andrea D'Alessandro, Han Zhao +1 more | 2019-11-19 |
| 10453535 | Segmented erase in memory | Shantanu R. Rajwade, Akira Goda, Krishna K. Parat, Hiroyuki Sanda | 2019-10-22 |
| 10454495 | Apparatus and method for mapping binary to ternary and its reverse | Ravi H. Motwani | 2019-10-22 |
| 10438656 | System and method for performing a concurrent multiple page read of a memory array | Aliasgar S. Madraswala, Bharat Pathak, Binh Ngo, Naveen Vittal Prabhu, Karthikeyan Ramamurthi | 2019-10-08 |
| 10430114 | Buffer operations in memory | Shantanu R. Rajwade | 2019-10-01 |
| 10409506 | Sense flags in a memory device | Shafqat Ahmed, Khaled Hasnat, Krishna K. Parat, Aaron Yip, Mark A. Helm +1 more | 2019-09-10 |
| 10379738 | Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation | Shantanu R. Rajwade, Toru Tanzawa | 2019-08-13 |
| 10303571 | Data recovery in memory devices | Ning Wu, Xin Guo, Ramkarthik Ganesan, Robert E. Frickey | 2019-05-28 |
| 10289313 | Method and apparatus for improving sequential reading in NAND flash | Han-Din Liu, Shantanu R. Rajwade | 2019-05-14 |
| 10290356 | Erase and soft program for vertical NAND flash | Krishna K. Parat, Koichi Kawai, Akira Goda | 2019-05-14 |
| 10275156 | Managing solid state drive defect redundancies at sub-block granularity | Anand S. Ramalingam, Jawad B. Khan | 2019-04-30 |
| 10276252 | Data storage device with operation based on temperature difference | Aliasgar S. Madraswala, Xin Guo, Ali Khakifirooz, Sagar Upadhyay | 2019-04-30 |
| 10254977 | Achieving consistent read times in multi-level non-volatile memory | Anand S. Ramalingam | 2019-04-09 |
| 10242734 | Resuming storage die programming after power loss | Ali Khakifirooz, Rohit S. Shenoy, Aliasgar S. Madraswala, Yogesh B. Wakchaure | 2019-03-26 |
| 10217515 | Programming memory devices | Akira Goda, Tommaso Vali, Carmine Miccoli | 2019-02-26 |
| 10141071 | Predictive count fail byte (CFBYTE) for non-volatile memory | Shantanu R. Rajwade | 2018-11-27 |
| 10126967 | Sense operation flags in a memory device | Shafqat Ahmed, Khaled Hasnat, Krishna K. Parat, Aaron Yip, Mark A. Helm +1 more | 2018-11-13 |
| 10120751 | Techniques to recover data using exclusive OR (XOR) parity information | Jawad B. Khan, Anand S. Ramalingam | 2018-11-06 |
| 10109361 | Coarse pass and fine pass multi-level NVM programming | Ali Khakifirooz, Rohit S. Shenoy, Aliasgar S. Madraswala, Donia Sebastian, Xin Guo | 2018-10-23 |
| 10102903 | Write process for a non volatile memory device | Tommaso Vali, Violante Moschiano, Andrea D'Alessandro | 2018-10-16 |
| 10043574 | Programming memories with multi-level pass signal | Shyam Sunder Raghunathan, Krishna K. Parat, Charan Srinivasan | 2018-08-07 |
| 9977622 | Buffer operations in memory | Shantanu R. Rajwade | 2018-05-22 |
| 9922704 | Programming memories with multi-level pass signal | Shyam Sunder Raghunathan, Krishna K. Parat, Charan Srinivasan | 2018-03-20 |
| 9910594 | Apparatuses and methods for concurrently accessing multiple memory planes of a memory during a memory access operation | Shantanu R. Rajwade, Toru Tanzawa | 2018-03-06 |
| 9870169 | Interleaved all-level programming of non-volatile memory | Anand S. Ramalingam, Dale Juenemann | 2018-01-16 |