Issued Patents All Time
Showing 25 most recent of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393367 | Lean command sequence for multi-plane read operations | Naveen Vittal Prabhu, Sandeep Rasoori, Trupti Bemalkhedkar | 2025-08-19 |
| 12366965 | Solid state drive with multiplexed internal channel access during program data transfers | David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, David B. Carlton, Donia Sebastian +2 more | 2025-07-22 |
| 12360669 | Method and apparatus to reduce memory in a NAND flash device to store page related information | Shanmathi Mookiah, Pratyush Chandrapati, Naveen Vittal Prabhu | 2025-07-15 |
| 12334136 | Independent multi-page read operation enhancement technology | Naveen Prabhu, Bharat Pathak, Binh Ngo, Netra Mahuli, Ahsanur Rahman | 2025-06-17 |
| 12254933 | Smart prologue for nonvolatile memory program operation | Pranav Chava, Sagar Upadhyay, Bhaskar Venkataramaiah | 2025-03-18 |
| 12230334 | Dynamic program caching | Ali Khakifirooz, Bhaskar Venkataramaiah, Sagar Upadhyay, Yogesh B. Wakchaure | 2025-02-18 |
| 12211563 | Dynamic gate steps for last-level programming to improve write performance | Sagar Upadhyay, Archana Tankasala, Shantanu R. Rajwade | 2025-01-28 |
| 12189955 | Skip program verify for dynamic start voltage sampling | Archana Tankasala, Sagar Upadhyay, Shantanu R. Rajwade | 2025-01-07 |
| 12154620 | Method and apparatus to improve read latency of a multi-threshold level cell block-based non-volatile memory | Lei Chen, Yogesh B. Wakchaure, Xin Guo, Cole Uhlman | 2024-11-26 |
| 12154627 | Block list management for wordline start voltage | Sagar Upadhyay, Pranav Chava | 2024-11-26 |
| 12099420 | Persistent data structure to track and manage SSD defects | Naveen Vittal Prabhu, Rohit S. Shenoy, Shankar Natarajan, Arun S. Athreya | 2024-09-24 |
| 12046303 | Smart prologue for nonvolatile memory program operation | Pranav Chava, Sagar Upadhyay, Bhaskar Venkataramaiah | 2024-07-23 |
| 11923016 | Progressive program suspend resume | Sagar Upadhyay, Jiantao Zhou | 2024-03-05 |
| 11797188 | Solid state drive with multiplexed internal channel access during program data transfers | David J. Pelster, Yogesh B. Wakchaure, Neelesh Vemula, David B. Carlton, Donia Sebastian +2 more | 2023-10-24 |
| 11783893 | Utilizing NAND buffer for DRAM-less multilevel cell programming | Shankar Natarajan, Suresh Nagarajan, Yihua Zhang | 2023-10-10 |
| 11693582 | Automatic read calibration operations | Ali Khakifirooz, Camila Jaramillo, John Egler, Netra Mahuli, Renjie Chen +1 more | 2023-07-04 |
| 11402996 | Methods and apparatus to perform erase-suspend operations in memory devices | Yogesh B. Wakchaure, Camila Jaramillo, Trupti Bemalkhedkar | 2022-08-02 |
| 11210025 | Memory device including concurrent suspend states for different operations | Purval S. Sule, Karthikeyan Ramamurthi | 2021-12-28 |
| 11163480 | Method and apparatus for performing an erase operation comprising a sequence of micro-pulses in a memory device | Kristopher H. Gaewsky, Siddhanth Munukutla, Tanya Wanchoo, Heonwook Kim | 2021-11-02 |
| 11138102 | Read quality of service for non-volatile memory | Sagar S. Sidhpura, Yogesh B. Wakchaure, Fei Xue | 2021-10-05 |
| 11061762 | Memory programming techniques | Naveen Vittal Prabhu, Bharat Pathak, Yogesh B. Wakchaure, Violante Moschiano, Walter Di Francesco +2 more | 2021-07-13 |
| 10956081 | Method, system, and apparatus for multi-tiered progressive memory program operation suspend and resume | David J. Pelster, David B. Carlton, Mark Anthony Golez, Xin Guo, Sagar S. Sidhpura +4 more | 2021-03-23 |
| 10891072 | NAND flash thermal alerting | Naveen Vittal Prabhu, Simon Ramage | 2021-01-12 |
| 10877696 | Independent NAND memory operations by plane | Yogesh B. Wakchaure, David J. Pelster, Donia Sebastian, Curtis A. Gittens, Xin Guo +3 more | 2020-12-29 |
| 10762974 | One check fail byte (CFBYTE) scheme | Kristopher H. Gaewsky, Naveen Vittal Prabhu, Purval S. Sule, Trupti Bemalkhedkar, Nehul N. Tailor +2 more | 2020-09-01 |