| 11210025 |
Memory device including concurrent suspend states for different operations |
Aliasgar S. Madraswala, Purval S. Sule |
2021-12-28 |
| 10514862 |
Memory device including concurrent suspend states for different operations |
Aliasgar S. Madraswala, Purval S. Sule |
2019-12-24 |
| 10438656 |
System and method for performing a concurrent multiple page read of a memory array |
Aliasgar S. Madraswala, Bharat Pathak, Binh Ngo, Naveen Vittal Prabhu, Pranav Kalavade |
2019-10-08 |
| 8069403 |
Majority voting logic circuit for dual bus width |
Omprakash Bisen, Hima Bindu |
2011-11-29 |
| 7327605 |
High bandwidth datapath load and test of multi-level memory cells |
Daniel Elmhurst, Quan H. Ngo, Robert L. Melcher |
2008-02-05 |
| 7177186 |
High bandwidth datapath load and test of multi-level memory cells |
Daniel Elmhurst, Quan H. Ngo, Robert L. Melcher |
2007-02-13 |
| 7075822 |
High bandwidth datapath load and test of multi-level memory cells |
Daniel Elmhurst, Quan H. Ngo, Robert L. Melcher |
2006-07-11 |
| 7057934 |
Flash memory with coarse/fine gate step programming |
Sreeram Krishnamachari |
2006-06-06 |
