Issued Patents All Time
Showing 25 most recent of 123 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12367935 | Acceleration of data queries in memory | Joseph T. Pawlowski | 2025-07-22 |
| 12326782 | Adjustment of code rate as function of memory endurance state metric | Kishore Kumar Muchherla, Niccolo' Righetti, Sivagnanam Parthasarathy, Mustafa N. Kaynak, James Fitzpatrick +1 more | 2025-06-10 |
| 12310010 | Transistors with raised extension regions and semiconductor fins | Haitao Liu, Michael P. Violette, Guangyu Huang, Vladimir Mikhalev | 2025-05-20 |
| 12169461 | Status check using chip enable pin | Chulbum Kim, Yoav Weinberg | 2024-12-17 |
| 12119051 | Memory array reset read operation | Jeremy Binfet, William C. Filipiak, Mark Hawes | 2024-10-15 |
| 12086466 | Implementing variable number of bits per cell on storage devices | — | 2024-09-10 |
| 12026052 | Partitioned memory having error detection capability | Kishore Kumar Muchherla, Niccolo' Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2024-07-02 |
| 11983067 | Adjustment of code rate as function of memory endurance state metric | Kishore Kumar Muchherla, Niccolo′ Righetti, Sivagnanam Parthasarathy, Mustafa N. Kaynak, James Fitzpatrick +1 more | 2024-05-14 |
| 11899966 | Implementing fault tolerant page stripes on low density memory systems | Kishore Kumar Muchherla, Giuseppina Puzzilli, Peter Feeley, Yifen Liu, Violante Moschiano +2 more | 2024-02-13 |
| 11829245 | Multi-layer code rate architecture for copyback between partitions with different code rates | Mustafa N. Kaynak, Kishore Kumar Muchherla, Sivagnanam Parthasarathy, James Fitzpatrick | 2023-11-28 |
| 11823742 | Acceleration of data queries in memory | Joseph T. Pawlowski | 2023-11-21 |
| 11797531 | Acceleration of data queries in memory | Joseph T. Pawlowski | 2023-10-24 |
| 11789629 | Separate partition for buffer and snapshot memory | Kishore Kumar Muchherla, Niccolo' Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2023-10-17 |
| 11775208 | Partitions within snapshot memory for buffer and snapshot memory | Kishore Kumar Muchherla, Niccolo′ Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2023-10-03 |
| 11776629 | Threshold voltage based on program/erase cycles | Niccolo' Righetti, Kishore Kumar Muchherla, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2023-10-03 |
| 11694763 | Read voltage calibration for copyback operation | Kishore Kumar Muchherla, Niccolo' Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2023-07-04 |
| 11663104 | Threshold voltage distribution adjustment for buffer | Jeffrey S. McNeil, Niccolo′ Righetti, Kishore Kumar Muchherla, Akira Goda, Todd A. Marquart +4 more | 2023-05-30 |
| 11640262 | Implementing variable number of bits per cell on storage devices | — | 2023-05-02 |
| 11635906 | Acceleration of data queries in memory | Joseph T. Pawlowski | 2023-04-25 |
| 11556267 | Data management during a copyback operation | Kishore Kumar Muchherla, Niccolo′ Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2023-01-17 |
| 11500791 | Status check using chip enable pin | Chulbum Kim, Yoav Weinberg | 2022-11-15 |
| 11487436 | Trims corresponding to logical unit quantity | Jeffrey S. McNeil, Niccolo' Righetti, Kishore Kumar Muchherla, Akira Goda, Todd A. Marquart +4 more | 2022-11-01 |
| 11481273 | Partitioned memory having error detection capability | Kishore Kumar Muchherla, Niccolo′ Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2022-10-25 |
| 11449271 | Implementing fault tolerant page stripes on low density memory systems | Kishore Kumar Muchherla, Giuseppina Puzzilli, Peter Feeley, Yifen Liu, Violante Moschiano +2 more | 2022-09-20 |
| 11423976 | Memory array reset read operation | Jeremy Binfet, William C. Filipiak, Mark Hawes | 2022-08-23 |