Issued Patents All Time
Showing 25 most recent of 143 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12400721 | Tracking RC time constant by wordline in memory devices | Agostino Macerola | 2025-08-26 |
| 12393526 | NAND page buffer based security operations | Jeremy Binfet, Lance W. Dover, Walter Di Francesco | 2025-08-19 |
| 12380931 | Cross-temperature compensation in a memory sub-system | Andrea Giovanni Xotta, Umberto Siciliani | 2025-08-05 |
| 12315573 | Method and apparatus to reduce power consumption of page buffer circuitry in a non-volatile memory device | Mattia Cichocki, Violante Moschiano, Guido Luciano Rizzo, Chang Wan Ha, Richard Fastow | 2025-05-27 |
| 12271592 | Independent plane architecture in a memory device | Andrea Giovanni Xotta, Dheeraj Srinivasan, Ali Mohammadzadeh, Karl D. Schuh, Guido Luciano Rizzo +7 more | 2025-04-08 |
| 12189949 | Bit error management in memory devices | Jeremy Binfet, Walter Di Francesco, Luigi Pilolli, Angelo Covello, Andrea D'Alessandro +3 more | 2025-01-07 |
| 12027219 | Tracking RC time constant by wordline in memory devices | Agostino Macerola | 2024-07-02 |
| 12007912 | NAND page buffer based security operations | Jeremy Binfet, Lance W. Dover, Walter Di Francesco | 2024-06-11 |
| 11887680 | Reducing program verifies for multi-level NAND cells | Jeffrey S. McNeil, Jason Lee Nevill | 2024-01-30 |
| 11875859 | Memory devices for comparing input data to data stored in memory cells coupled to a data line | Kenneth J. Eldredge, Frankie F. Roohparvar, Luca De Santis | 2024-01-16 |
| 11842078 | Asynchronous interrupt event handling in multi-plane memory devices | Andrea Giovanni Xotta, Guido Luciano Rizzo, Umberto Siciliani, Luca De Santis, Walter Di Francesco | 2023-12-12 |
| 11704047 | Temperature readings for memory devices to reduce temperature compensation errors | Agostino Macerola, Michele Piccardi, Umberto Siciliani, Enrico Favaro | 2023-07-18 |
| 11682458 | Memory devices for pattern matching based on majority of cell pair match | Luca De Santis, Kenneth J. Eldredge, Vishal Sarin | 2023-06-20 |
| 11568940 | Apparatus for determining data states of memory cells | Luca De Santis, Ramin Ghodsi | 2023-01-31 |
| 11550717 | Apparatuses and methods for concurrently accessing different memory planes of a memory | Andrea Giovanni Xotta, Umberto Siciliani, Luca DeSantis, Michele Incarnati | 2023-01-10 |
| 11508447 | Memories for determining data states of memory cells | Ramin Ghodsi | 2022-11-22 |
| 11437103 | Memory cells configured to generate weighted inputs for neural networks | Umberto Minucci, Fernanda Irrera, Luca De Santis | 2022-09-06 |
| 11417406 | Reducing program verifies for multi-level NAND cells | Jeffrey S. McNeil, Jason Lee Nevill | 2022-08-16 |
| 11309039 | Apparatus for determining a pass voltage of a read operation | Violante Moschiano, Tecla Ghilardi, Emilio Camerlenghi, William C. Filipiak, Andrea D'Alessandro | 2022-04-19 |
| 11205481 | Memory devices for pattern matching | Luca De Santis, Kenneth J. Eldredge, Vishal Sarin | 2021-12-21 |
| 11163572 | Memory systems and memory control methods | Umberto Siciliani, Walter Di-Francesco, Violante Moschiano, Andrea Smaniotto | 2021-11-02 |
| 11107536 | Apparatus for determining data states of memory cells | Luca De Santis, Ramin Ghodsi | 2021-08-31 |
| 11074982 | Memory configured to perform logic operations on values representative of sensed characteristics of data lines and a threshold data value | Kenneth J. Eldredge, Frankie F. Roohparvar, Luca De Santis | 2021-07-27 |
| 11056201 | Apparatus for determining data states of memory cells | Ramin Ghodsi | 2021-07-06 |
| 10984864 | Methods and apparatus for pattern matching in a memory containing sets of memory elements | Luca De Santis, Kenneth J. Eldredge, Vishal Sarin | 2021-04-20 |