Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Aaron Yip — 149 Patents

Micron: 122 patents #108 of 6,374Top 2%
HOHouzz: 10 patents #1 of 19Top 6%
Intel: 7 patents #5,443 of 30,777Top 20%
Cypress Semiconductor: 4 patents #443 of 1,852Top 25%
RRRound Rock Research: 2 patents #110 of 239Top 50%
LGLodestar Licensing Group: 1 patents #26 of 80Top 35%
HAHyundai Electronics America: 1 patents #75 of 148Top 55%
Los Gatos, CA: #19 of 2,986 inventorsTop 1%
California: #1,012 of 386,348 inventorsTop 1%
Overall (All Time): #6,316 of 4,157,543Top 1%
149 Patents All Time
Aaron Yip has been granted 149 US patents while listed as an inventor at Micron. The first was granted in 1997 and the most recent in April 2025. Aaron Yip ranks #6,316 of 4,157,543 US inventors in our database (top 0.15%). Patent records list Aaron Yip in Los Gatos, CA, US.

Issued Patents All Time

Showing 1–25 of 149 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12271592 Independent plane architecture in a memory device Andrea Giovanni Xotta, Dheeraj Srinivasan, Ali Mohammadzadeh, Karl D. Schuh, Guido Luciano Rizzo +7 more 2025-04-08
12131782 3D memory device including shared select gate connections between memory blocks 2024-10-29
12125786 Devices including stair step structures, and related memory devices and electronic systems Paolo Tessariol, Graham R. Wolstenholme 2024-10-22 $36,004,000
12114499 Block-on-block memory array architecture using bi-directional staircases 2024-10-08
12080351 Using non-segregated cells as drain-side select gates for sub-blocks in a memory device 2024-09-03 $19,072,000
12080360 Reducing programming disturbance in memory devices 2024-09-03 $19,072,000
12080700 Microelectronic devices including control logic regions Kunal R. Parekh, Akira Goda 2024-09-03 $19,072,000
12068272 Microelectronic devices having a memory array region, a control logic region, and signal routing structures Akira Goda, Kunal R. Parekh 2024-08-20
11915758 Memory devices with four data line bias levels Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning +2 more 2024-02-27 $14,682,000
11688470 Reducing programming disturbance in memory devices 2023-06-27 $8,383,000
11688463 Vertical string driver for memory array Tomoko Ogura Iwasaki 2023-06-27 $8,383,000
11670370 3D memory device including shared select gate connections between memory blocks 2023-06-06 $9,972,000
11636886 Memory devices with user-defined tagging mechanism Theodore T. Pekny 2023-04-25 $16,156,000
11605588 Memory device including data lines on multiple device levels Violante Moschiano, Paolo Tessariol, Naveen Kaushik 2023-03-14 $12,786,000
11587919 Microelectronic devices, related electronic systems, and methods of forming microelectronic devices Kunal R. Parekh, Akira Goda 2023-02-21 $8,544,000
11574685 Apparatus for memory cell programming 2023-02-07 $15,619,000
11562791 Memory devices with four data line bias levels Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning +2 more 2023-01-24 $10,431,000
11557080 Dynamically modeling an object in an environment from different perspectives Xiaoyi Huang 2023-01-17
11545456 Microelectronic devices, electronic systems having a memory array region and a control logic region, and methods of forming microelectronic devices Akira Goda, Kunal R. Parekh 2023-01-03 $12,293,000
11430734 Methods of forming memory devices including stair step structures Paolo Tessariol, Graham R. Wolstenholme 2022-08-30 $13,952,000
11404125 Memory cell programming applying a programming pulse having different voltage levels 2022-08-02 $10,849,000
11342034 Reducing programming disturbance in memory devices 2022-05-24 $16,890,000
11335700 Block-on-block memory array architecture using bi-directional staircases 2022-05-17 $11,540,000
11329058 Microelectronic devices and memory devices 2022-05-10 $22,602,000
11302397 Memory block select circuitry including voltage bootstrapping control 2022-04-12 $14,807,000