Issued Patents All Time
Showing 1–25 of 71 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12125786 | Devices including stair step structures, and related memory devices and electronic systems | Paolo Tessariol, Aaron Yip | 2024-10-22 |
| 11430734 | Methods of forming memory devices including stair step structures | Paolo Tessariol, Aaron Yip | 2022-08-30 |
| 11393716 | Devices including stair step structures, and related apparatuses and memory devices | Chang Wan Ha, Deepak Thimmegowda | 2022-07-19 |
| 11302634 | Microelectronic devices with symmetrically distributed staircase stadiums and related systems and methods | Lifang Xu, Jian Li, Paolo Tessariol, George Matamis, Nancy M. Lomeli | 2022-04-12 |
| 10879175 | Memory devices including stair step or tiered structures and related methods | Paolo Tessariol, Aaron Yip | 2020-12-29 |
| 10748811 | Memory devices and related methods | Chang Wan Ha, Deepak Thimmegowda | 2020-08-18 |
| 10381086 | Multiple blocks per string in 3D NAND memory | Akira Goda, Tomoharu Tanaka | 2019-08-13 |
| 10290581 | Methods of forming conductive structures including stair step or tiered structures having conductive portions | Paolo Tessariol, Aaron Yip | 2019-05-14 |
| 10269626 | Stair step formation using at least two masks | Chang Wan Ha, Deepak Thimmegowda | 2019-04-23 |
| 9941209 | Conductive structures, systems and devices including conductive structures and related methods | Paolo Tessariol, Aaron Yip | 2018-04-10 |
| 9870941 | Stair step formation using at least two masks | Chang Wan Ha, Deepak Thimmegowda | 2018-01-16 |
| 9786375 | Multiple blocks per string in 3D NAND memory | Akira Goda, Tomoharu Tanaka | 2017-10-10 |
| 9553099 | Pillar arrangement in NAND memory | — | 2017-01-24 |
| 9508731 | Pillar arrangement in NAND memory | — | 2016-11-29 |
| 9508591 | Stair step formation using at least two masks | Chang Wan Ha, Deepak Thimmegowda | 2016-11-29 |
| 9082772 | Stair step formation using at least two masks | Chang Wan Ha, Deepak Thimmegowda | 2015-07-14 |
| 8609536 | Stair step formation using at least two masks | Chang Wan Ha, Deepak Thimmegowda | 2013-12-17 |
| 8508999 | Vertical NAND memory | Zengtao T. Liu | 2013-08-13 |
| 8034716 | Semiconductor structures including vertical diode structures and methods for making the same | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Raymond A. Turi | 2011-10-11 |
| 8035189 | Semiconductor constructions | Michael A. Smith, Sukesh Sandhu, Xianfeng Zhou | 2011-10-11 |
| 7781860 | Semiconductor constructions, and electronic systems | Michael A. Smith, Sukesh Sandhu, Xianfeng Zhou | 2010-08-24 |
| 7569468 | Method for forming a floating gate memory with polysilicon local interconnects | Chun-Ming Chen, Guy T. Blalock, Kirk D. Prall | 2009-08-04 |
| 7563679 | Reduction of field edge thinning in peripheral devices | Mark A. Helm | 2009-07-21 |
| 7563666 | Semiconductor structures including vertical diode structures and methods of making the same | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Raymond A. Turi | 2009-07-21 |
| 7517749 | Method for forming an array with polysilicon local interconnects | Chun-Ming Chen, Guy T. Blalock, Kirk D. Prall | 2009-04-14 |