Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8034716 | Semiconductor structures including vertical diode structures and methods for making the same | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2011-10-11 |
| 7563666 | Semiconductor structures including vertical diode structures and methods of making the same | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2009-07-21 |
| 7279725 | Vertical diode structures | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2007-10-09 |
| 7170103 | Wafer with vertical diode structures | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2007-01-30 |
| 7166875 | Vertical diode structures | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2007-01-23 |
| 6916710 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Fernando Gonzalez | 2005-07-12 |
| 6797978 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Fernando Gonzalez | 2004-09-28 |
| 6787401 | Method of making vertical diode structures | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2004-09-07 |
| 6784046 | Method of making vertical diode structures | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2004-08-31 |
| 6750091 | Diode formation method | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2004-06-15 |
| 6740552 | Method of making vertical diode structures | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2004-05-25 |
| 6677650 | Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications | Mark Fischer, Jigish Trivedi, Charles H. Dennison, Todd R. Abbott | 2004-01-13 |
| 6653195 | Fabrication of three dimensional container diode for use with multi-state material in a non-volatile memory cell | Fernando Gonzalez, Graham R. Wolstenholme, Charles L. Ingalls | 2003-11-25 |
| 6534780 | Array of ultra-small pores for memory cells | Fernando Gonzalez | 2003-03-18 |
| 6444520 | Method of forming dual conductive plugs | Charles H. Dennison | 2002-09-03 |
| 6429449 | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell | Fernando Gonzalez, Graham R. Wolstenholme, Charles L. Ingalls | 2002-08-06 |
| 6421282 | Cascade-booted programming voltage circuit | Huy T. Vo | 2002-07-16 |
| 6391688 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Fernando Gonzalez | 2002-05-21 |
| 6376358 | Method of forming plugs and local interconnect for embedded memory/system-on-chip (SOC) applications | Mark Fischer, Jigish Trivedi, Charles H. Dennison, Todd R. Abbott | 2002-04-23 |
| 6300684 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Fernando Gonzalez | 2001-10-09 |
| 6223432 | Method of forming dual conductive plugs | Charles H. Dennison | 2001-05-01 |
| 6194746 | Vertical diode structures with low series resistance | Fernando Gonzalez, Tyler Lowrey, Trung T. Doan, Graham R. Wolstenholme | 2001-02-27 |
| 6118135 | Three-dimensional container diode for use with multi-state material in a non-volatile memory cell | Fernando Gonzalez, Graham R. Wolstenholme, Charles L. Ingalls | 2000-09-12 |
| 6111264 | Small pores defined by a disposable internal spacer for use in chalcogenide memories | Graham R. Wolstenholme, Steven T. Harshfield, Fernando Gonzalez, Guy T. Blalock, Donwon Park | 2000-08-29 |
| 6104038 | Method for fabricating an array of ultra-small pores for chalcogenide memory cells | Fernando Gonzalez | 2000-08-15 |