SH

Steven T. Harshfield

Micron: 32 patents #586 of 6,345Top 10%
RR Round Rock Research: 4 patents #47 of 239Top 20%
Overall (All Time): #90,729 of 4,157,543Top 3%
37
Patents All Time

Issued Patents All Time

Showing 25 most recent of 37 patents

Patent #TitleCo-InventorsDate
8786101 Contact structure in a memory device 2014-07-22
8362625 Contact structure in a memory device 2013-01-29
8076783 Memory devices having contact features 2011-12-13
8017453 Method and apparatus for forming an integrated circuit electrode having a reduced contact area 2011-09-13
7687793 Resistance variable memory cells David Q. Wright 2010-03-30
7687796 Method and apparatus for forming an integrated circuit electrode having a reduced contact area 2010-03-30
RE40842 Memory elements and methods for making same 2009-07-14
7504730 Memory elements 2009-03-17
7271440 Method and apparatus for forming an integrated circuit electrode having a reduced contact area 2007-09-18
7235419 Method of making a memory cell David Q. Wright 2007-06-26
7102150 PCRAM memory cell and method of making same David Q. Wright 2006-09-05
7078755 Memory cell with selective deposition of refractory metals Allen McTeer 2006-07-18
7071021 PCRAM memory cell and method of making same David Q. Wright 2006-07-04
6831330 Method and apparatus for forming an integrated circuit electrode having a reduced contact area 2004-12-14
6607974 Method of forming a contact structure in a semiconductor device 2003-08-19
6563156 Memory elements and methods for making same 2003-05-13
6455424 Selective cap layers over recessed polysilicon plugs Allen McTeer 2002-09-24
6440837 Method of forming a contact structure in a semiconductor device 2002-08-27
6440795 Hemispherical grained silicon on conductive nitride 2002-08-27
6420725 Method and apparatus for forming an integrated circuit electrode having a reduced contact area 2002-07-16
6413812 Methods for forming ZPROM using spacers as an etching mask 2002-07-02
6187631 Hemispherical grained silicon on conductive nitride 2001-02-13
6117720 Method of making an integrated circuit electrode having a reduced contact area 2000-09-12
6111264 Small pores defined by a disposable internal spacer for use in chalcogenide memories Graham R. Wolstenholme, Raymond A. Turi, Fernando Gonzalez, Guy T. Blalock, Donwon Park 2000-08-29
6077729 Memory array having a multi-state element and method for forming such array or cellis thereof 2000-06-20