Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Todd R. Abbott — 52 Patents

Micron: 52 patents #343 of 6,374Top 6%
Nampa, ID: #11 of 306 inventorsTop 4%
Idaho: #271 of 8,810 inventorsTop 4%
Overall (All Time): #50,240 of 4,157,543Top 2%
52 Patents All Time
Todd R. Abbott has been granted 52 US patents while listed as an inventor at Micron. The first was granted in 1999 and the most recent in April 2014. Todd R. Abbott ranks #50,240 of 4,157,543 US inventors in our database (top 1.2%). Patent records list Todd R. Abbott in Nampa, ID, US.

Issued Patents All Time

Showing 1–25 of 52 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8685625 Photoresist processing methods Kevin J. Torek, Sandra Tagg, Amy Weatherly 2014-04-01 $8,870,000
8614473 Flash memory with recessed floating gate 2013-12-24 $23,729,000
8482047 DRAM layout with vertical FETS and method of formation Homer M. Manning 2013-07-09 $4,909,000
8389360 DRAM layout with vertical FETs and method of formation 2013-03-05 $2,757,000
8283112 Photoresist processing methods Kevin J. Torek, Sandra Tagg, Amy Weatherly 2012-10-09 $2,419,000
8274106 DRAM layout with vertical FETs and method of formation H. Montgomery Manning 2012-09-25 $2,699,000
7989866 DRAM layout with vertical FETS and method of formation Homer M. Manning 2011-08-02 $1,985,000
7982255 Flash memory with recessed floating gate 2011-07-19 $6,454,000
7977037 Photoresist processing methods Kevin J. Torek, Sandra Tagg, Amy Weatherly 2011-07-12 $2,990,000
7968928 DRAM layout with vertical FETs and method of formation 2011-06-28 $1,920,000
7768051 DRAM including a vertical surround gate transistor 2010-08-03 $2,326,000
7736969 DRAM layout with vertical FETS and method of formation Homer M. Manning 2010-06-15 $3,984,000
7723185 Flash memory with recessed floating gate 2010-05-25 $4,235,000
7566620 DRAM including a vertical surround gate transistor 2009-07-28 $5,815,000
7560336 DRAM layout with vertical FETs and method of formation 2009-07-14 $3,519,000
7518182 DRAM layout with vertical FETs and method of formation Homer M. Manning 2009-04-14 $2,483,000
7453103 Semiconductor constructions H. Montgomery Manning 2008-11-18 $969,000
7402861 Memory cells and select gates of NAND memory arrays Michael P. Violette 2008-07-22 $1,260,000
7365385 DRAM layout with vertical FETs and method of formation 2008-04-29 $1,653,000
7351659 Methods of forming a transistor with an integrated metal silicide gate electrode 2008-04-01 $2,352,000
7348236 Formation of memory cells and select gates of NAND memory arrays Michael P. Violette 2008-03-25 $1,523,000
7342272 Flash memory with recessed floating gate 2008-03-11 $3,016,000
7319605 Conductive structure for microelectronic devices and methods of fabricating such structures 2008-01-15 $2,581,000
7276414 NAND memory arrays and methods Michael P. Violette, Garo Derderian 2007-10-02 $909,000
7262089 Methods of forming semiconductor structures H. Montgomery Manning 2007-08-28 $1,732,000