SN

Sheyang Ning

Micron: 19 patents #907 of 6,345Top 15%
NA Nantero: 5 patents #25 of 73Top 35%
Overall (All Time): #166,789 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12431198 Charge loss acceleration during programming of memory cells in a memory sub-system Lawrence Celso Miranda, Zhengyi Zhang 2025-09-30
12347485 Establishing bitline, wordline and boost voltages to manage a maximum program voltage level during all levels programming of a memory device Lawrence Celso Miranda, Jeffrey S. McNeil, Tomoko Ogura Iwasaki 2025-07-01
12260914 Level shifting in all levels programming of a memory device in a memory sub-system Lawrence Celso Miranda 2025-03-25
12254927 In-line programming adjustment of a memory cell in a memory sub-system Lawrence Celso Miranda, Zhengyi Zhang, Tomoko Ogura Iwasaki 2025-03-18
12224012 All level coarse/fine programming of memory cells Lawrence Celso Miranda, Tomoko Ogura Iwasaki, Jeffrey S. McNeil 2025-02-11
12211552 Concurrent slow-fast memory cell programming Lawrence Celso Miranda, Tomoko Ogura Iwasaki, Jeffrey S. McNeil 2025-01-28
12141445 Managing dielectric stress of a memory device using controlled ramping slopes Lawrence Celso Miranda 2024-11-12
12112819 Apparatus for determining memory cell data states Lawrence Celso Miranda, Tomoko Ogura Iwasaki, Ting Luo, Luyen Vu 2024-10-08
12014778 In-line programming adjustment of a memory cell in a memory sub-system Lawrence Celso Miranda, Zhengyi Zhang, Tomoko Ogura Iwasaki 2024-06-18
11961566 Fast bit erase for upper tail tightening of threshold voltage distributions Lawrence Celso Miranda, Tomoko Ogura Iwasaki 2024-04-16
11915758 Memory devices with four data line bias levels Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Lawrence Celso Miranda +2 more 2024-02-27
11887668 All levels programming of a memory device in a memory sub-system Lawrence Celso Miranda 2024-01-30
11798647 Apparatus and methods for determining memory cell data states Lawrence Celso Miranda, Tomoko Ogura Iwasaki, Ting Luo, Luyen Vu 2023-10-24
11749346 Overwrite mode in memory programming operations Tomoko Ogura Iwasaki, Kulachet Tanpairoj, Jianmin Huang, Lawrence Celso Miranda 2023-09-05
11742036 Reducing maximum programming voltage in memory programming operations Lawrence Celso Miranda, Tomoko Ogura Iwasaki 2023-08-29
11664079 Intervallic dynamic start voltage and program verify sampling in a memory sub-system Lawrence Celso Miranda, Eric N. Lee, Tong Liu, Cobie B. Loper, Ugo Russo 2023-05-30
11562791 Memory devices with four data line bias levels Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Lawrence Celso Miranda +2 more 2023-01-24
11494084 Managing dielectric stress of a memory device using controlled ramping slopes Lawrence Celso Miranda 2022-11-08
11462281 Intervallic dynamic start voltage and program verify sampling in a memory sub-system Lawrence Celso Miranda, Eric N. Lee, Tong Liu, Cobie B. Loper, Ugo Russo 2022-10-04
11037624 Devices for programming resistive change elements in resistive change element arrays Jia Luo, Lee Cleveland 2021-06-15
10825516 Resistive change element cells sharing selection devices Jia Luo, Shiang-Meei Heh 2020-11-03
10446228 Devices and methods for programming resistive change elements Jia Luo, Lee Cleveland 2019-10-15
10387244 Methods for error correction with resistive change element arrays 2019-08-20
10261861 Methods for error correction with resistive change element arrays 2019-04-16