| 12431198 |
Charge loss acceleration during programming of memory cells in a memory sub-system |
Sheyang Ning, Zhengyi Zhang |
2025-09-30 |
| 12347485 |
Establishing bitline, wordline and boost voltages to manage a maximum program voltage level during all levels programming of a memory device |
Sheyang Ning, Jeffrey S. McNeil, Tomoko Ogura Iwasaki |
2025-07-01 |
| 12260914 |
Level shifting in all levels programming of a memory device in a memory sub-system |
Sheyang Ning |
2025-03-25 |
| 12254927 |
In-line programming adjustment of a memory cell in a memory sub-system |
Sheyang Ning, Zhengyi Zhang, Tomoko Ogura Iwasaki |
2025-03-18 |
| 12224012 |
All level coarse/fine programming of memory cells |
Tomoko Ogura Iwasaki, Sheyang Ning, Jeffrey S. McNeil |
2025-02-11 |
| 12211552 |
Concurrent slow-fast memory cell programming |
Tomoko Ogura Iwasaki, Sheyang Ning, Jeffrey S. McNeil |
2025-01-28 |
| 12141445 |
Managing dielectric stress of a memory device using controlled ramping slopes |
Sheyang Ning |
2024-11-12 |
| 12112819 |
Apparatus for determining memory cell data states |
Sheyang Ning, Tomoko Ogura Iwasaki, Ting Luo, Luyen Vu |
2024-10-08 |
| 12014778 |
In-line programming adjustment of a memory cell in a memory sub-system |
Sheyang Ning, Zhengyi Zhang, Tomoko Ogura Iwasaki |
2024-06-18 |
| 11961566 |
Fast bit erase for upper tail tightening of threshold voltage distributions |
Sheyang Ning, Tomoko Ogura Iwasaki |
2024-04-16 |
| 11915758 |
Memory devices with four data line bias levels |
Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning +2 more |
2024-02-27 |
| 11887668 |
All levels programming of a memory device in a memory sub-system |
Sheyang Ning |
2024-01-30 |
| 11798647 |
Apparatus and methods for determining memory cell data states |
Sheyang Ning, Tomoko Ogura Iwasaki, Ting Luo, Luyen Vu |
2023-10-24 |
| 11749346 |
Overwrite mode in memory programming operations |
Tomoko Ogura Iwasaki, Kulachet Tanpairoj, Jianmin Huang, Sheyang Ning |
2023-09-05 |
| 11742036 |
Reducing maximum programming voltage in memory programming operations |
Sheyang Ning, Tomoko Ogura Iwasaki |
2023-08-29 |
| 11742034 |
Memory device including dynamic programming voltage |
Eric N. Lee |
2023-08-29 |
| 11664079 |
Intervallic dynamic start voltage and program verify sampling in a memory sub-system |
Eric N. Lee, Tong Liu, Sheyang Ning, Cobie B. Loper, Ugo Russo |
2023-05-30 |
| 11562791 |
Memory devices with four data line bias levels |
Hao Thai Nguyen, Tomoko Ogura Iwasaki, Erwin E. Yu, Dheeraj Srinivasan, Sheyang Ning +2 more |
2023-01-24 |
| 11494084 |
Managing dielectric stress of a memory device using controlled ramping slopes |
Sheyang Ning |
2022-11-08 |
| 11462281 |
Intervallic dynamic start voltage and program verify sampling in a memory sub-system |
Eric N. Lee, Tong Liu, Sheyang Ning, Cobie B. Loper, Ugo Russo |
2022-10-04 |
| 11335418 |
Memory device including dynamic programming voltage |
Eric N. Lee |
2022-05-17 |
