Issued Patents All Time
Showing 25 most recent of 40 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423002 | Selectively programming retired wordlines of a memory device | Kishore Kumar Muchherla, Akira Goda, Jeffrey S. McNeil, Niccolo' Righetti, Silvia Beltrami +1 more | 2025-09-23 |
| 12417035 | Modified read counter incrementing scheme in a memory sub-system | Kishore Kumar Muchherla, Jonathan S. Parry, Nicola Ciocchini, Animesh Chowdhury, Akira Goda +2 more | 2025-09-16 |
| 12400688 | Assemblies comprising memory cells and select gates; and methods of forming assemblies | — | 2025-08-26 |
| 12353771 | Charge loss mitigation throughout memory device lifecycle by proactive window shift | Steven Michael Kientz, Vamsi Pavan Rayaprolu | 2025-07-08 |
| 12326782 | Adjustment of code rate as function of memory endurance state metric | Kishore Kumar Muchherla, Niccolo' Righetti, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Mark A. Helm +1 more | 2025-06-10 |
| 12260916 | Partial block handling in a non-volatile memory device | Zhongguang Xu, Nicola Ciocchini, Zhenlei Shen, Charles See Yeung Kwong, Murong Lang +1 more | 2025-03-25 |
| 12224016 | Transient and stable state read operations of a memory device | Karan Banerjee, Shyam Sunder Raghunathan | 2025-02-11 |
| 12131028 | Programming selective word lines during an erase operation in a memory device | Jeffrey S. McNeil, Jonathan S. Parry, Akira Goda, Kishore Kumar Muchherla, Violante Moschiano +2 more | 2024-10-29 |
| 11983067 | Adjustment of code rate as function of memory endurance state metric | Kishore Kumar Muchherla, Niccolo′ Righetti, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Mark A. Helm +1 more | 2024-05-14 |
| 11977774 | Charge loss mitigation throughout memory device lifecycle by proactive window shift | Steven Michael Kientz, Vamsi Pavan Rayaprolu | 2024-05-07 |
| 11961581 | Assemblies comprising memory cells and select gates; and methods of forming assemblies | — | 2024-04-16 |
| 11925022 | Microelectronic and semiconductor devices with a tunneling structure free of high-γ material by a select gate structure, and related methods | Chris M. Carlson | 2024-03-05 |
| 11922029 | Modified read counter incrementing scheme in a memory sub-system | Kishore Kumar Muchherla, Jonathan S. Parry, Nicola Ciocchini, Animesh Chowdhury, Akira Goda +2 more | 2024-03-05 |
| 11901014 | Partial block handling in a non-volatile memory device | Zhongguang Xu, Nicola Ciocchini, Zhenlei Shen, Charles See Yeung Kwong, Murong Lang +1 more | 2024-02-13 |
| 11776633 | Apparatus and methods for determining data states of memory cells | Violante Moschiano, William C. Filipiak, Andrea D'Alessandro | 2023-10-03 |
| 11664079 | Intervallic dynamic start voltage and program verify sampling in a memory sub-system | Lawrence Celso Miranda, Eric N. Lee, Tong Liu, Sheyang Ning, Cobie B. Loper | 2023-05-30 |
| 11569255 | Void formation in charge trap structures | Chris M. Carlson | 2023-01-31 |
| 11526277 | Adjustable NAND write performance | Giuseppe Cariello, Mauro Sali, Stefano Falduti | 2022-12-13 |
| 11462281 | Intervallic dynamic start voltage and program verify sampling in a memory sub-system | Lawrence Celso Miranda, Eric N. Lee, Tong Liu, Sheyang Ning, Cobie B. Loper | 2022-10-04 |
| 11211399 | Electronic apparatus with an oxide-only tunneling structure by a select gate tier, and related methods | Chris M. Carlson | 2021-12-28 |
| 11170826 | Assemblies comprising memory cells and select gates; and methods of forming assemblies | — | 2021-11-09 |
| 11037951 | Void formation in charge trap structures | Chris M. Carlson | 2021-06-15 |
| 10901622 | Adjustable NAND write performance | Giuseppe Cariello, Mauro Sali, Stefano Falduti | 2021-01-26 |
| 10872670 | Methods for determining data states of memory cells | Violante Moschiano, William C. Filipiak, Andrea D'Alessandro | 2020-12-22 |
| 10658428 | Methods of operating memory devices and apparatuses | Andrea Redaelli, Giorgio Servalli | 2020-05-19 |