Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JP

Jonathan S. Parry — 157 Patents

Micron: 142 patents #81 of 6,374Top 2%
Boise, ID: #29 of 3,546 inventorsTop 1%
Idaho: #42 of 8,810 inventorsTop 1%
Overall (All Time): #5,656 of 4,157,543Top 1%
157 Patents All Time
Jonathan S. Parry has been granted 157 US patents while listed as an inventor at Micron. The first was granted in 2018 and the most recent in December 2025. Jonathan S. Parry ranks #5,656 of 4,157,543 US inventors in our database (top 0.14%). Patent records list Jonathan S. Parry in Boise, ID, US.

Issued Patents All Time

Showing 1–25 of 157 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12511243 Host assisted operations in managed memory devices Nadav Grosz 2025-12-30
12511063 Host recovery for a stuck condition Dengcheng He 2025-12-30
12499952 Power management associated with memory and controller Liang Yu, Tal Sharifie 2025-12-16
12499039 Memory write performance techniques Biyu Zhao, Dengcheng He, Xue Lan Zhang 2025-12-16
12481556 Enhanced read performance for memory data word decoding using power allocation based on error pattern detection Nitul Gohain, Jameer Mulani 2025-11-25
12461667 Multiple current quantization values for peak power management Chung-woul Kim, Luca Nubile, Ali Mohammadzadeh, Biagio Iorio, Liang Yu +4 more 2025-11-04
12461818 Temporary parity buffer allocation for zones in a parity group Kishore Kumar Muchherla, David Scott Ebsen, Akira Goda, Vivek Shivhare, Suresh Rajgopal 2025-11-04
12455608 Peak power management extensions to application-specific integrated circuits Liang Yu, Chung-woul Kim, Tal Sharifie, Stephen Hanna 2025-10-28
12443264 Shallow hibernate power state Dengcheng He, Nadav Grosz 2025-10-14
12436692 Peak power management data burst communication Hojung Yun, Liang Yu 2025-10-07
12430258 Padding cached data with valid data for memory flush commands Kishore Kumar Muchherla, Akira Goda 2025-09-30
12417035 Modified read counter incrementing scheme in a memory sub-system Kishore Kumar Muchherla, Nicola Ciocchini, Animesh Chowdhury, Akira Goda, Jung Sheng Hoei +2 more 2025-09-16
12411775 Dual address encoding for logical-to-physical mapping Giuseppe Cariello 2025-09-09
12399630 Peak power management priority override Jeremy Binfet, Liang Yu, Chulbum Kim, Daniel J. Hubbard, Suresh Rajgopal 2025-08-26
12400726 Topology-based retirement in a memory system Chun Sum Yeung, Deping He 2025-08-26
12386543 Opportunistic storage of non-write-boosted data in write booster cache memory Giuseppe Cariello, Reshmi Basu 2025-08-12
12386518 Write booster pinning Reshmi Basu, Yanhua Bi 2025-08-12
12366997 Storing parity during refresh operations Reshmi Basu 2025-07-22
12362030 Techniques for retiring blocks of a memory system Deping He, Chun Sum Yeung 2025-07-15
12362022 Scheduled interrupts for peak power management token ring communication Jeremy Binfet, Liang Yu 2025-07-15
12353723 Low-power boot-up for memory systems Reshmi Basu, David Aaron Palmer, Luca Porzio, Giuseppe Cariello, Stephen Hanna 2025-07-08
12346587 Techniques for concurrent host system access and data folding Nitul Gohain, Jameer Mulani 2025-07-01
12340126 Workload-based scan optimization Kishore Kumar Muchherla, Eric N. Lee, Jeffrey S. McNeil, Lakshmi Kalpana Vakati 2025-06-24
12333145 Peak power management in a memory device during suspend status Liang Yu, Fumin Gu, John Paul Aglubat 2025-06-17
12288579 Methods for independent memory bank maintenance and memory devices and systems employing the same George B. Raad, James S. Rehmeyer, Timothy B. Cowles 2025-04-29