Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12237015 | Adaptive sensing time for memory operations | Yu-Chung Lien, Vinh Diep, Zhenming Zhou | 2025-02-25 |
| 12079517 | Buffer allocation for reducing block transit penalty | Kishore Kumar Muchherla, Peter Feeley, Jiangli Zhu, Fangfang Zhu, Akira Goda +3 more | 2024-09-03 |
| 12051479 | Memory block programming using defectivity information | Kishore Kumar Muchherla, Akira Goda, Dave Scott Ebsen, Lakshmi Kalpana Vakati, Jiangli Zhu +3 more | 2024-07-30 |
| 12001721 | Multiple-pass programming of memory cells using temporary parity generation | Kishore Kumar Muchherla, Lakshmi Kalpana Vakati, Dave Scott Ebsen, Peter Feeley, Sanjay Subbarao +3 more | 2024-06-04 |
| 11995345 | Plane balancing in a memory system | John J. Kane, Byron D. Harris | 2024-05-28 |
| 11854603 | Logical to encoded value table in data storage device | Atif Hussain | 2023-12-26 |
| 11775222 | Adaptive context metadata message for optimized two-chip performance | Todd Lindberg, Robert W. Ellis, Kevin O'Toole | 2023-10-03 |
| 11550658 | Storage system and method for storing logical-to-physical address table entries in a codeword in volatile memory | James J. Walsh, Stephen Gold, David R. Meyer | 2023-01-10 |
| 11442852 | Adaptive context metadata message for optimized two-chip performance | Todd Lindberg, Robert W. Ellis, Kevin O'Toole | 2022-09-13 |
| 11429485 | Memories with end-to-end data protection using physical location check | Atif Hussain, Robert W. Ellis, Stephen Gold | 2022-08-30 |
| 10185658 | Efficient implementation of optimized host-based garbage collection strategies using xcopy and multiple logical stripes | Brian W. O'Krafka, Vladislav Bolkhovitin | 2019-01-22 |
| 9971514 | Dynamic logical groups for mapping flash memory | Vijay Sivasankaran, Abhijeet Manohar | 2018-05-15 |
| 9460815 | Reusing partial bad blocks in NAND memory | Vijay Sivasankaran, Abhijeet Manohar | 2016-10-04 |